Have you considered using emulated RISC-V cores on something like the icesugar instead of closed FPGAs with ARM cores? #998

HomingHamster · 2025-01-07T05:54:15Z

I am not a professional embedded developer, but I would really like to see an SDR that is totally open hardware, where the sand to silicone knowledge is available to all. One way to do this might be to use an emulated open core for the FPGA rather than arm or closed FPGAs. Some links, repositories, videos and, inspiration are available here https://circuspam.coffee/2024/12/29/entirely-self-soverign-48mhz-open-source-linux-computer-with-wifi-networking/

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Have you considered using emulated RISC-V cores on something like the icesugar instead of closed FPGAs with ARM cores? #998

Have you considered using emulated RISC-V cores on something like the icesugar instead of closed FPGAs with ARM cores? #998

HomingHamster commented Jan 7, 2025

Have you considered using emulated RISC-V cores on something like the icesugar instead of closed FPGAs with ARM cores? #998

Have you considered using emulated RISC-V cores on something like the icesugar instead of closed FPGAs with ARM cores? #998

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HomingHamster commented Jan 7, 2025