From b8ecabedcfda79870e10e653d836245efb96d6e8 Mon Sep 17 00:00:00 2001
From: bunnie <bunnie@kosagi.com>
Date: Tue, 3 Dec 2024 01:05:50 +0800
Subject: [PATCH] add more peripherals to register set

---
 utralib/cramium/daric.svd            | 4691 ++++++++++++++++++++++----
 utralib/src/generated/cramium_soc.rs | 2284 ++++++++++++-
 2 files changed, 6222 insertions(+), 753 deletions(-)

diff --git a/utralib/cramium/daric.svd b/utralib/cramium/daric.svd
index 39c77f127..edabe173e 100644
--- a/utralib/cramium/daric.svd
+++ b/utralib/cramium/daric.svd
@@ -452,7 +452,7 @@
             <registers>
                 <register>
                     <name>SFR_CRFUNC</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_alu\rtl\alu.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -468,7 +468,7 @@
                 </register>
                 <register>
                     <name>SFR_AR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_alu\rtl\alu.sv]]></description>
                     <addressOffset>0x0004</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -484,7 +484,7 @@
                 </register>
                 <register>
                     <name>SFR_SRMFSM</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_alu\rtl\alu.sv]]></description>
                     <addressOffset>0x0008</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -507,7 +507,7 @@
                 </register>
                 <register>
                     <name>SFR_FR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_alu\rtl\alu.sv]]></description>
                     <addressOffset>0x000c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -556,7 +556,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CRDIVLEN</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_alu\rtl\alu.sv]]></description>
                     <addressOffset>0x0010</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -572,7 +572,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SRDIVLEN</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_alu\rtl\alu.sv]]></description>
                     <addressOffset>0x0014</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -588,7 +588,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_OPT</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_alu\rtl\alu.sv]]></description>
                     <addressOffset>0x0018</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -604,7 +604,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_OPTLTX</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_alu\rtl\alu.sv]]></description>
                     <addressOffset>0x001c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -620,7 +620,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_CR_SEGCFG0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_alu\rtl\alu.sv]]></description>
                     <addressOffset>0x0030</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -636,7 +636,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_CR_SEGCFG1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_alu\rtl\alu.sv]]></description>
                     <addressOffset>0x0034</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -652,7 +652,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_CR_SEGCFG2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_alu\rtl\alu.sv]]></description>
                     <addressOffset>0x0038</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -668,7 +668,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_CR_SEGCFG3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_alu/rtl/alu.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_alu\rtl\alu.sv]]></description>
                     <addressOffset>0x003c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -696,7 +696,7 @@ position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFR_CRFUNC</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\aes.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -712,7 +712,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_AR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\aes.sv]]></description>
                     <addressOffset>0x0004</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -728,7 +728,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SRMFSM</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\aes.sv]]></description>
                     <addressOffset>0x0008</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -744,7 +744,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\aes.sv]]></description>
                     <addressOffset>0x000c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -785,7 +785,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_OPT</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\aes.sv]]></description>
                     <addressOffset>0x0010</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -815,7 +815,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_OPT1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\aes.sv]]></description>
                     <addressOffset>0x0014</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -831,7 +831,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_OPTLTX</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\aes.sv]]></description>
                     <addressOffset>0x0018</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -847,7 +847,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_MASKSEED</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\aes.sv]]></description>
                     <addressOffset>0x0020</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -863,7 +863,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_MASKSEEDAR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\aes.sv]]></description>
                     <addressOffset>0x0024</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -879,7 +879,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_PTRID_IV</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\aes.sv]]></description>
                     <addressOffset>0x0030</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -895,7 +895,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_PTRID_AKEY</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\aes.sv]]></description>
                     <addressOffset>0x0034</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -911,7 +911,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_PTRID_AIB</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\aes.sv]]></description>
                     <addressOffset>0x0038</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -927,7 +927,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_PTRID_AOB</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/aes.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\aes.sv]]></description>
                     <addressOffset>0x003c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -955,7 +955,7 @@ bit position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFR_CRFUNC</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\combohasha.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -971,7 +971,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_AR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\combohasha.sv]]></description>
                     <addressOffset>0x0004</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -987,7 +987,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SRMFSM</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\combohasha.sv]]></description>
                     <addressOffset>0x0008</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1003,7 +1003,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\combohasha.sv]]></description>
                     <addressOffset>0x000c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1060,7 +1060,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_OPT1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\combohasha.sv]]></description>
                     <addressOffset>0x0010</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1076,7 +1076,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_OPT2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\combohasha.sv]]></description>
                     <addressOffset>0x0014</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1113,7 +1113,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_OPT3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\combohasha.sv]]></description>
                     <addressOffset>0x0018</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1129,7 +1129,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_BLKT0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\combohasha.sv]]></description>
                     <addressOffset>0x001c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1145,7 +1145,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_SEGID_LKEY</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\combohasha.sv]]></description>
                     <addressOffset>0x0020</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1161,7 +1161,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_SEGID_KEY</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\combohasha.sv]]></description>
                     <addressOffset>0x0024</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1177,7 +1177,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_SEGID_SCRT</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\combohasha.sv]]></description>
                     <addressOffset>0x002c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1193,7 +1193,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_SEGID_MSG</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\combohasha.sv]]></description>
                     <addressOffset>0x0030</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1209,7 +1209,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_SEGID_HOUT</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\combohasha.sv]]></description>
                     <addressOffset>0x0034</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1225,7 +1225,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_SEGID_HOUT2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/combohasha.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\combohasha.sv]]></description>
                     <addressOffset>0x003c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1253,7 +1253,7 @@ bit position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFR_CRFUNC</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\pke.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1276,7 +1276,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_AR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\pke.sv]]></description>
                     <addressOffset>0x0004</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1292,7 +1292,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SRMFSM</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\pke.sv]]></description>
                     <addressOffset>0x0008</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1315,7 +1315,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\pke.sv]]></description>
                     <addressOffset>0x000c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1364,7 +1364,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_OPTNW</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\pke.sv]]></description>
                     <addressOffset>0x0010</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1380,7 +1380,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_OPTEW</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\pke.sv]]></description>
                     <addressOffset>0x0014</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1396,7 +1396,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_OPTRW</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\pke.sv]]></description>
                     <addressOffset>0x0018</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1412,7 +1412,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_OPTLTX</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\pke.sv]]></description>
                     <addressOffset>0x001c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1428,7 +1428,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_OPTMASK</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\pke.sv]]></description>
                     <addressOffset>0x0020</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1444,7 +1444,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_MIMMCR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\pke.sv]]></description>
                     <addressOffset>0x0024</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1460,7 +1460,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_PTRID_PCON</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\pke.sv]]></description>
                     <addressOffset>0x0030</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1476,7 +1476,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_PTRID_PIB0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\pke.sv]]></description>
                     <addressOffset>0x0034</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1492,7 +1492,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_PTRID_PIB1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\pke.sv]]></description>
                     <addressOffset>0x0038</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1508,7 +1508,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_PTRID_PKB</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\pke.sv]]></description>
                     <addressOffset>0x003c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1524,7 +1524,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEGPTR_PTRID_POB</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/pke.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\pke.sv]]></description>
                     <addressOffset>0x0040</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1552,7 +1552,7 @@ bit position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFR_CRSRC</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\trng.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1568,7 +1568,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CRANA</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\trng.sv]]></description>
                     <addressOffset>0x0004</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1584,7 +1584,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_PP</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\trng.sv]]></description>
                     <addressOffset>0x0008</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1600,7 +1600,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_OPT</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\trng.sv]]></description>
                     <addressOffset>0x000c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1616,7 +1616,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\trng.sv]]></description>
                     <addressOffset>0x0010</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1632,7 +1632,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_AR_GEN</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\trng.sv]]></description>
                     <addressOffset>0x0014</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1648,7 +1648,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\trng.sv]]></description>
                     <addressOffset>0x0018</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1665,7 +1665,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DRPSZ</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\trng.sv]]></description>
                     <addressOffset>0x0020</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1681,7 +1681,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DRGEN</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\trng.sv]]></description>
                     <addressOffset>0x0024</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1697,7 +1697,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DRRESEED</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\trng.sv]]></description>
                     <addressOffset>0x0028</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1713,7 +1713,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_BUF</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\trng.sv]]></description>
                     <addressOffset>0x0030</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1729,7 +1729,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CHAIN_RNGCHAINEN0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\trng.sv]]></description>
                     <addressOffset>0x0040</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1745,7 +1745,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CHAIN_RNGCHAINEN1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/trng.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\trng.sv]]></description>
                     <addressOffset>0x0044</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1773,7 +1773,7 @@ position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFR_SCHSTART_AR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1789,7 +1789,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_XCH_FUNC</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x0010</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1805,7 +1805,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_XCH_OPT</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x0014</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1821,7 +1821,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_XCH_AXSTART</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x0018</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1837,7 +1837,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_XCH_SEGID</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x001c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1853,7 +1853,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_XCH_SEGSTART</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x0020</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1869,7 +1869,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_XCH_TRANSIZE</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x0024</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1885,7 +1885,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SCH_FUNC</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x0030</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1901,7 +1901,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SCH_OPT</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x0034</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1917,7 +1917,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SCH_AXSTART</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x0038</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1933,7 +1933,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SCH_SEGID</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x003c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1949,7 +1949,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SCH_SEGSTART</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x0040</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1965,7 +1965,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SCH_TRANSIZE</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x0044</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1981,7 +1981,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_ICH_OPT</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x0050</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -1997,7 +1997,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_ICH_SEGID</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x0054</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2013,7 +2013,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_ICH_RPSTART</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x0058</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2029,7 +2029,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_ICH_WPSTART</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x005c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2045,7 +2045,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_ICH_TRANSIZE</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/scedma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\scedma.sv]]></description>
                     <addressOffset>0x0060</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2073,7 +2073,7 @@ position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFR_SCEMODE</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2089,7 +2089,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SUBEN</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0004</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2104,24 +2104,24 @@ position to clear the flag]]></description>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_AHBS</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <name>SFR_APBS</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0008</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_ahbsopt</name>
+                            <name>cr_apbsopt</name>
                             <msb>4</msb>
                             <bitRange>[4:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_ahbsopt read/write control register]]></description>
+                            <description><![CDATA[cr_apbsopt read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
                     <name>SFR_SRBUSY</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0010</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2137,7 +2137,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FRDONE</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0014</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2154,7 +2154,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FRERR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0018</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2171,7 +2171,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_ARCLR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x001c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2187,7 +2187,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_TICKCYC</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0020</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2203,7 +2203,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_TICKCNT</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0024</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2219,7 +2219,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FFEN</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0030</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2235,7 +2235,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FFCLR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0034</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2251,7 +2251,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FFCNT_SR_FF0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0040</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2267,7 +2267,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FFCNT_SR_FF1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0044</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2283,7 +2283,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FFCNT_SR_FF2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0048</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2299,7 +2299,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FFCNT_SR_FF3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x004c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2315,7 +2315,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FFCNT_SR_FF4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0050</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2331,7 +2331,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FFCNT_SR_FF5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0054</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2347,7 +2347,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FRACERR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x0060</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2364,7 +2364,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_TS</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/crypto_top/rtl/sce_glbsfra.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\crypto_top\rtl\sce_glbsfra.sv]]></description>
                     <addressOffset>0x00fc</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2392,7 +2392,7 @@ bit position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFR_TXD</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/duart.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\duart.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2408,7 +2408,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/duart.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\duart.sv]]></description>
                     <addressOffset>0x0004</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2424,7 +2424,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/duart.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\duart.sv]]></description>
                     <addressOffset>0x0008</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2440,7 +2440,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_ETUC</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/duart.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\duart.sv]]></description>
                     <addressOffset>0x000c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2468,7 +2468,7 @@ bit position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFRCR_TRM</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/rbist/rtl/rbist_wrp.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\rbist\rtl\rbist_wrp.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2484,7 +2484,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFRAR_TRM</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/rbist/rtl/rbist_wrp.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\rbist\rtl\rbist_wrp.sv]]></description>
                     <addressOffset>0x0004</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2536,7 +2536,7 @@ bit position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFR_CM7EVSEL_CM7EVSEL0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2552,7 +2552,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CM7EVSEL_CM7EVSEL1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0004</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2568,7 +2568,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CM7EVSEL_CM7EVSEL2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0008</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2584,7 +2584,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CM7EVSEL_CM7EVSEL3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x000c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2600,7 +2600,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CM7EVSEL_CM7EVSEL4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0010</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2616,7 +2616,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CM7EVSEL_CM7EVSEL5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0014</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2632,7 +2632,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CM7EVSEL_CM7EVSEL6</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0018</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2648,7 +2648,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CM7EVSEL_CM7EVSEL7</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x001c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2664,7 +2664,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CM7EVEN</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0020</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2680,7 +2680,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CM7EVFR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0024</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2697,7 +2697,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_TMREVSEL</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0030</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2713,7 +2713,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_PWMEVSEL</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0034</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2729,7 +2729,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IFEVEN_IFEVEN0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0040</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2745,7 +2745,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IFEVEN_IFEVEN1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0044</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2761,7 +2761,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IFEVEN_IFEVEN2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0048</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2777,7 +2777,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IFEVEN_IFEVEN3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x004c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2793,7 +2793,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IFEVEN_IFEVEN4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0050</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2809,7 +2809,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IFEVEN_IFEVEN5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0054</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2825,7 +2825,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IFEVEN_IFEVEN6</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0058</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2841,7 +2841,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IFEVEN_IFEVEN7</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x005c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2857,7 +2857,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IFEVERRFR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0060</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2874,7 +2874,7 @@ bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CM7ERRFR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/evc.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\evc.sv]]></description>
                     <addressOffset>0x0080</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2903,7 +2903,7 @@ position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFR_CGUSEC</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2919,7 +2919,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGULP</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0004</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2935,7 +2935,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEED</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0008</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2951,7 +2951,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SEEDAR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x000c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2967,7 +2967,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUSEL0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0010</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2983,7 +2983,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUFD_CFGFDCR_0_4_0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0014</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -2999,7 +2999,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUFD_CFGFDCR_0_4_1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0018</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3015,7 +3015,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUFD_CFGFDCR_0_4_2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x001c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3031,7 +3031,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUFD_CFGFDCR_0_4_3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0020</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3047,7 +3047,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUFD_CFGFDCR_0_4_4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0024</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3063,7 +3063,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUFDAO</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0028</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3079,7 +3079,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUSET</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x002c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3095,7 +3095,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUSEL1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0030</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3111,7 +3111,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUFDPKE</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0034</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3127,7 +3127,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUFSSR_FSFREQ0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0040</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3143,7 +3143,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUFSSR_FSFREQ1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0044</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3159,7 +3159,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUFSSR_FSFREQ2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0048</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3175,7 +3175,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUFSSR_FSFREQ3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x004c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3191,7 +3191,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUFSVLD</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0050</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3207,7 +3207,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CGUFSCR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0054</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3223,7 +3223,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_ACLKGR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0060</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3239,7 +3239,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_HCLKGR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0064</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3255,7 +3255,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_ICLKGR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0068</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3271,7 +3271,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_PCLKGR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x006c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3287,7 +3287,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_RCURST0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0080</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3303,7 +3303,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_RCURST1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0084</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3319,7 +3319,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_RCUSRCFR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0088</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3336,7 +3336,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IPCARIPFLOW</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0090</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3352,7 +3352,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IPCEN</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0094</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3368,7 +3368,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IPCLPEN</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x0098</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3384,7 +3384,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IPCOSC</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x009c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3400,7 +3400,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IPCPLLMN</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x00a0</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3416,7 +3416,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IPCPLLF</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x00a4</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3432,7 +3432,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IPCPLLQ</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x00a8</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3448,7 +3448,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IPCCR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sysctrl/rtl/sysctrl.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sysctrl\rtl\sysctrl.sv]]></description>
                     <addressOffset>0x00ac</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3488,7 +3488,7 @@ respective bit position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFR_CTRL</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3518,7 +3518,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFGINFO</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0004</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3548,7 +3548,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CONFIG</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0008</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3599,7 +3599,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FLEVEL</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x000c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3636,7 +3636,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_TXF0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0010</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3652,7 +3652,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_TXF1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0014</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3668,7 +3668,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_TXF2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0018</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3684,7 +3684,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_TXF3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x001c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3700,7 +3700,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_RXF0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0020</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3716,7 +3716,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_RXF1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0024</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3732,7 +3732,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_RXF2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0028</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3748,7 +3748,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_RXF3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x002c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3764,7 +3764,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_ELEVEL</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0030</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3829,7 +3829,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_ETYPE</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0034</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3859,7 +3859,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EVENT_SET</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0038</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3875,7 +3875,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EVENT_CLR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x003c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3891,7 +3891,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EVENT_STATUS</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0040</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3907,7 +3907,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EXTCLOCK</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0044</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3951,7 +3951,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FIFO_CLR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0048</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3967,7 +3967,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_QDIV0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0050</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -3997,7 +3997,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_QDIV1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0054</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4027,7 +4027,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_QDIV2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0058</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4057,7 +4057,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_QDIV3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x005c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4087,7 +4087,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_SYNC_BYPASS</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0060</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4103,7 +4103,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IO_OE_INV</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0064</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4119,7 +4119,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IO_O_INV</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0068</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4135,7 +4135,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IO_I_INV</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x006c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4151,7 +4151,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IRQMASK_0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0070</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4167,7 +4167,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IRQMASK_1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0074</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4183,7 +4183,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IRQMASK_2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0078</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4199,7 +4199,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IRQMASK_3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x007c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4215,7 +4215,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_IRQ_EDGE</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0080</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4231,7 +4231,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DBG_PADOUT</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0084</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4247,7 +4247,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DBG_PADOE</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0088</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4263,7 +4263,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DBG0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0090</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4286,7 +4286,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DBG1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0094</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4309,7 +4309,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DBG2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0098</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4332,7 +4332,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DBG3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x009c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4355,7 +4355,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_MEM_GUTTER</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00a0</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4371,7 +4371,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_PERI_GUTTER</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00a4</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4387,7 +4387,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DMAREQ_MAP_CR_EVMAP0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00b0</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4403,7 +4403,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DMAREQ_MAP_CR_EVMAP1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00b4</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4419,7 +4419,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DMAREQ_MAP_CR_EVMAP2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00b8</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4435,7 +4435,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DMAREQ_MAP_CR_EVMAP3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00bc</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4451,7 +4451,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DMAREQ_MAP_CR_EVMAP4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00c0</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4467,7 +4467,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DMAREQ_MAP_CR_EVMAP5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00c4</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4483,7 +4483,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DMAREQ_STAT_SR_EVSTAT0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00c8</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4499,7 +4499,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DMAREQ_STAT_SR_EVSTAT1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00cc</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4515,7 +4515,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DMAREQ_STAT_SR_EVSTAT2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00d0</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4531,7 +4531,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DMAREQ_STAT_SR_EVSTAT3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00d4</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4547,7 +4547,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DMAREQ_STAT_SR_EVSTAT4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00d8</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4563,7 +4563,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_DMAREQ_STAT_SR_EVSTAT5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00dc</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4579,7 +4579,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FILTER_BASE_0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00e0</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4595,7 +4595,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FILTER_BOUNDS_0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00e4</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4611,7 +4611,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FILTER_BASE_1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00e8</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4627,7 +4627,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FILTER_BOUNDS_1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00ec</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4643,7 +4643,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FILTER_BASE_2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00f0</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4659,7 +4659,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FILTER_BOUNDS_2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00f4</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4675,7 +4675,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FILTER_BASE_3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00f8</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4691,7 +4691,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_FILTER_BOUNDS_3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x00fc</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4719,7 +4719,7 @@ respective bit position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFR_AFSEL_CRAFSEL0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4735,7 +4735,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_AFSEL_CRAFSEL1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0004</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4751,7 +4751,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_AFSEL_CRAFSEL2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0008</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4767,7 +4767,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_AFSEL_CRAFSEL3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x000c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4783,7 +4783,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_AFSEL_CRAFSEL4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0010</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4799,7 +4799,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_AFSEL_CRAFSEL5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0014</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4815,7 +4815,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_AFSEL_CRAFSEL6</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0018</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4831,7 +4831,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_AFSEL_CRAFSEL7</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x001c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4847,7 +4847,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_AFSEL_CRAFSEL8</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0020</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4863,7 +4863,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_AFSEL_CRAFSEL9</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0024</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4879,7 +4879,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_AFSEL_CRAFSEL10</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0028</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4895,7 +4895,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_AFSEL_CRAFSEL11</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x002c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4911,7 +4911,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_INTCR_CRINT0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0100</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4927,7 +4927,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_INTCR_CRINT1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0104</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4943,7 +4943,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_INTCR_CRINT2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0108</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4959,7 +4959,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_INTCR_CRINT3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x010c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4975,7 +4975,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_INTCR_CRINT4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0110</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -4991,7 +4991,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_INTCR_CRINT5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0114</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5007,7 +5007,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_INTCR_CRINT6</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0118</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5023,7 +5023,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_INTCR_CRINT7</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x011c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5039,7 +5039,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_INTFR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0120</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5056,7 +5056,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOOUT_CRGO0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0130</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5072,7 +5072,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOOUT_CRGO1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0134</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5088,7 +5088,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOOUT_CRGO2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0138</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5104,7 +5104,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOOUT_CRGO3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x013c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5120,7 +5120,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOOUT_CRGO4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0140</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5136,7 +5136,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOOUT_CRGO5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0144</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5152,7 +5152,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOOE_CRGOE0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0148</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5168,7 +5168,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOOE_CRGOE1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x014c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5184,7 +5184,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOOE_CRGOE2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0150</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5200,7 +5200,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOOE_CRGOE3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0154</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5216,7 +5216,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOOE_CRGOE4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0158</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5232,7 +5232,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOOE_CRGOE5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x015c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5248,7 +5248,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOPU_CRGPU0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0160</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5264,7 +5264,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOPU_CRGPU1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0164</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5280,7 +5280,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOPU_CRGPU2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0168</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5296,7 +5296,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOPU_CRGPU3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x016c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5312,7 +5312,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOPU_CRGPU4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0170</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5328,7 +5328,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOPU_CRGPU5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0174</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5344,7 +5344,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOIN_SRGI0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0178</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5360,7 +5360,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOIN_SRGI1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x017c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5376,7 +5376,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOIN_SRGI2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0180</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5392,7 +5392,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOIN_SRGI3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0184</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5408,7 +5408,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOIN_SRGI4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0188</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5424,7 +5424,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_GPIOIN_SRGI5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x018c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5440,7 +5440,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_PIOSEL</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0200</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5456,7 +5456,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_SCHM_CR_CFG_SCHMSEL0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0230</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5472,7 +5472,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_SCHM_CR_CFG_SCHMSEL1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0234</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5488,7 +5488,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_SCHM_CR_CFG_SCHMSEL2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0238</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5504,7 +5504,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_SCHM_CR_CFG_SCHMSEL3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x023c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5520,7 +5520,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_SCHM_CR_CFG_SCHMSEL4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0240</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5536,7 +5536,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_SCHM_CR_CFG_SCHMSEL5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0244</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5552,7 +5552,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_SLEW_CR_CFG_SLEWSLOW0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0248</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5568,7 +5568,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_SLEW_CR_CFG_SLEWSLOW1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x024c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5584,7 +5584,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_SLEW_CR_CFG_SLEWSLOW2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0250</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5600,7 +5600,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_SLEW_CR_CFG_SLEWSLOW3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0254</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5616,7 +5616,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_SLEW_CR_CFG_SLEWSLOW4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0258</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5632,7 +5632,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_SLEW_CR_CFG_SLEWSLOW5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x025c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5648,7 +5648,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_DRVSEL_CR_CFG_DRVSEL0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0260</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5664,7 +5664,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_DRVSEL_CR_CFG_DRVSEL1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0264</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5680,7 +5680,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_DRVSEL_CR_CFG_DRVSEL2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0268</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5696,7 +5696,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_DRVSEL_CR_CFG_DRVSEL3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x026c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5712,7 +5712,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_DRVSEL_CR_CFG_DRVSEL4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0270</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -5728,7 +5728,7 @@ position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_CFG_DRVSEL_CR_CFG_DRVSEL5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/ifsub/rtl/iox.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\iox.sv]]></description>
                     <addressOffset>0x0274</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -6974,962 +6974,4159 @@ position to clear the flag]]></description>
             </addressBlock>
         </peripheral>
         <peripheral>
-            <name>CORESUB_SRAMTRM</name>
-            <baseAddress>0x40014000</baseAddress>
-            <groupName>CORESUB_SRAMTRM</groupName>
+            <name>SDDC</name>
+            <baseAddress>0x50121000</baseAddress>
+            <groupName>SDDC</groupName>
             <registers>
                 <register>
-                    <name>SFR_CACHE</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/coresub_sramtrm.sv]]></description>
+                    <name>SFR_IO</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sfr_cache</name>
-                            <msb>2</msb>
-                            <bitRange>[2:0]</bitRange>
+                            <name>sfr_io</name>
+                            <msb>1</msb>
+                            <bitRange>[1:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sfr_cache read/write control register]]></description>
+                            <description><![CDATA[sfr_io read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_ITCM</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/coresub_sramtrm.sv]]></description>
+                    <name>SFR_AR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
                     <addressOffset>0x0004</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sfr_itcm</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>sfr_ar</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sfr_itcm read/write control register]]></description>
+                            <description><![CDATA[sfr_ar performs action on write of value: 0x5a]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_DTCM</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/coresub_sramtrm.sv]]></description>
-                    <addressOffset>0x0008</addressOffset>
+                    <name>CR_OCR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0010</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sfr_dtcm</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cr_ocr</name>
+                            <msb>23</msb>
+                            <bitRange>[23:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sfr_dtcm read/write control register]]></description>
+                            <description><![CDATA[cr_ocr read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_SRAM0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/coresub_sramtrm.sv]]></description>
-                    <addressOffset>0x000c</addressOffset>
+                    <name>CR_RDFFTHRES</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0014</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sfr_sram0</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cr_rdffthres</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sfr_sram0 read/write control register]]></description>
+                            <description><![CDATA[cr_rdffthres read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_SRAM1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/coresub_sramtrm.sv]]></description>
-                    <addressOffset>0x0010</addressOffset>
+                    <name>CR_REV</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0018</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sfr_sram1</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cfg_reg_sd_spec_revision</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sfr_sram1 read/write control register]]></description>
+                            <description><![CDATA[cfg_reg_sd_spec_revision read/write control register]]></description>
+                        </field>
+                        <field>
+                            <name>cfg_reg_cccr_sdio_revision</name>
+                            <msb>15</msb>
+                            <bitRange>[15:8]</bitRange>
+                            <lsb>8</lsb>
+                            <description><![CDATA[cfg_reg_cccr_sdio_revision read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_VEXRAM</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/coresub_sramtrm.sv]]></description>
-                    <addressOffset>0x0014</addressOffset>
+                    <name>CR_BACSA</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x001c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sfr_vexram</name>
-                            <msb>2</msb>
-                            <bitRange>[2:0]</bitRange>
+                            <name>cfg_base_addr_csa</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sfr_vexram read/write control register]]></description>
+                            <description><![CDATA[cfg_base_addr_csa read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_SRAMERR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/coresub_sramtrm.sv]]></description>
+                    <name>CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
                     <addressOffset>0x0020</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>srambankerr</name>
-                            <msb>3</msb>
-                            <bitRange>[3:0]</bitRange>
+                            <name>cfg_base_addr_io_func0</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[srambankerr flag register. `1` means event happened, write back `1` in
-respective bit position to clear the flag]]></description>
+                            <description><![CDATA[cfg_base_addr_io_func read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
-            </registers>
-            <addressBlock>
-                <offset>0</offset>
-                <size>0x24</size>
-                <usage>registers</usage>
-            </addressBlock>
-        </peripheral>
-        <peripheral>
-            <name>MDMA</name>
-            <baseAddress>0x40012000</baseAddress>
-            <groupName>MDMA</groupName>
-            <registers>
                 <register>
-                    <name>SFR_EVSEL_CR_EVSEL0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0000</addressOffset>
+                    <name>CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0024</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_evsel0</name>
-                            <msb>7</msb>
-                            <bitRange>[7:0]</bitRange>
+                            <name>cfg_base_addr_io_func1</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                            <description><![CDATA[cfg_base_addr_io_func read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_EVSEL_CR_EVSEL1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0004</addressOffset>
+                    <name>CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0028</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_evsel1</name>
-                            <msb>7</msb>
-                            <bitRange>[7:0]</bitRange>
+                            <name>cfg_base_addr_io_func2</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                            <description><![CDATA[cfg_base_addr_io_func read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_EVSEL_CR_EVSEL2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0008</addressOffset>
+                    <name>CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x002c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_evsel2</name>
-                            <msb>7</msb>
-                            <bitRange>[7:0]</bitRange>
+                            <name>cfg_base_addr_io_func3</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                            <description><![CDATA[cfg_base_addr_io_func read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_EVSEL_CR_EVSEL3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x000c</addressOffset>
+                    <name>CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0030</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_evsel3</name>
-                            <msb>7</msb>
-                            <bitRange>[7:0]</bitRange>
+                            <name>cfg_base_addr_io_func4</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                            <description><![CDATA[cfg_base_addr_io_func read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_EVSEL_CR_EVSEL4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0010</addressOffset>
+                    <name>CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0034</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_evsel4</name>
-                            <msb>7</msb>
-                            <bitRange>[7:0]</bitRange>
+                            <name>cfg_base_addr_io_func5</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                            <description><![CDATA[cfg_base_addr_io_func read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_EVSEL_CR_EVSEL5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0014</addressOffset>
+                    <name>CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0038</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_evsel5</name>
-                            <msb>7</msb>
-                            <bitRange>[7:0]</bitRange>
+                            <name>cfg_base_addr_io_func6</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                            <description><![CDATA[cfg_base_addr_io_func read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_EVSEL_CR_EVSEL6</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0018</addressOffset>
+                    <name>CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC7</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x003c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_evsel6</name>
-                            <msb>7</msb>
-                            <bitRange>[7:0]</bitRange>
+                            <name>cfg_base_addr_io_func7</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                            <description><![CDATA[cfg_base_addr_io_func read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_EVSEL_CR_EVSEL7</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x001c</addressOffset>
+                    <name>CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0040</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_evsel7</name>
-                            <msb>7</msb>
-                            <bitRange>[7:0]</bitRange>
+                            <name>cfg_reg_func_cis_ptr0</name>
+                            <msb>16</msb>
+                            <bitRange>[16:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                            <description><![CDATA[cfg_reg_func_cis_ptr read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_CR_CR_MDMAREQ0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0020</addressOffset>
+                    <name>CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0044</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_mdmareq0</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cfg_reg_func_cis_ptr1</name>
+                            <msb>16</msb>
+                            <bitRange>[16:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                            <description><![CDATA[cfg_reg_func_cis_ptr read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_CR_CR_MDMAREQ1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0024</addressOffset>
+                    <name>CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0048</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_mdmareq1</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cfg_reg_func_cis_ptr2</name>
+                            <msb>16</msb>
+                            <bitRange>[16:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                            <description><![CDATA[cfg_reg_func_cis_ptr read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_CR_CR_MDMAREQ2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0028</addressOffset>
+                    <name>CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x004c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_mdmareq2</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cfg_reg_func_cis_ptr3</name>
+                            <msb>16</msb>
+                            <bitRange>[16:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                            <description><![CDATA[cfg_reg_func_cis_ptr read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_CR_CR_MDMAREQ3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x002c</addressOffset>
+                    <name>CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0050</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_mdmareq3</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cfg_reg_func_cis_ptr4</name>
+                            <msb>16</msb>
+                            <bitRange>[16:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                            <description><![CDATA[cfg_reg_func_cis_ptr read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_CR_CR_MDMAREQ4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0030</addressOffset>
+                    <name>CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0054</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_mdmareq4</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cfg_reg_func_cis_ptr5</name>
+                            <msb>16</msb>
+                            <bitRange>[16:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                            <description><![CDATA[cfg_reg_func_cis_ptr read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_CR_CR_MDMAREQ5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0034</addressOffset>
+                    <name>CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0058</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_mdmareq5</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cfg_reg_func_cis_ptr6</name>
+                            <msb>16</msb>
+                            <bitRange>[16:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                            <description><![CDATA[cfg_reg_func_cis_ptr read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_CR_CR_MDMAREQ6</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0038</addressOffset>
+                    <name>CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR7</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x005c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_mdmareq6</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cfg_reg_func_cis_ptr7</name>
+                            <msb>16</msb>
+                            <bitRange>[16:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                            <description><![CDATA[cfg_reg_func_cis_ptr read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_CR_CR_MDMAREQ7</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x003c</addressOffset>
+                    <name>CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0060</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_mdmareq7</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cfg_reg_func_ext_std_code0</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                            <description><![CDATA[cfg_reg_func_ext_std_code read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_SR_SR_MDMAREQ0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0040</addressOffset>
+                    <name>CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0064</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sr_mdmareq0</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cfg_reg_func_ext_std_code1</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                            <description><![CDATA[cfg_reg_func_ext_std_code read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_SR_SR_MDMAREQ1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0044</addressOffset>
+                    <name>CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0068</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sr_mdmareq1</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cfg_reg_func_ext_std_code2</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                            <description><![CDATA[cfg_reg_func_ext_std_code read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_SR_SR_MDMAREQ2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0048</addressOffset>
+                    <name>CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x006c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sr_mdmareq2</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cfg_reg_func_ext_std_code3</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                            <description><![CDATA[cfg_reg_func_ext_std_code read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_SR_SR_MDMAREQ3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x004c</addressOffset>
+                    <name>CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0070</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sr_mdmareq3</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cfg_reg_func_ext_std_code4</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                            <description><![CDATA[cfg_reg_func_ext_std_code read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_SR_SR_MDMAREQ4</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
+                    <name>CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0074</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_ext_std_code5</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_ext_std_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0078</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_ext_std_code6</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_ext_std_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE7</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x007c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_ext_std_code7</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_ext_std_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_WRITE_PROTECT</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0080</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_write_protect</name>
+                            <msb>0</msb>
+                            <bitRange>[0:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_write_protect read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_DSR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0084</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_reg_dsr</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_dsr read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_CID_CFG_REG_CID0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0088</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_cid0</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_cid read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_CID_CFG_REG_CID1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x008c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_cid1</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_cid read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_CID_CFG_REG_CID2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0090</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_cid2</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_cid read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_CID_CFG_REG_CID3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0094</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_cid3</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_cid read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_CSD_CFG_REG_CSD0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0098</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_csd0</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_csd read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_CSD_CFG_REG_CSD1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x009c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_csd1</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_csd read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_CSD_CFG_REG_CSD2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00a0</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_csd2</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_csd read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_CSD_CFG_REG_CSD3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00a4</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_csd3</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_csd read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SCR_CFG_REG_SCR0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00a8</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_scr0</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_scr read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SCR_CFG_REG_SCR1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00ac</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_scr1</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_scr read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00b0</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status0</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00b4</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status1</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00b8</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status2</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00bc</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status3</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00c0</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status4</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00c4</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status5</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00c8</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status6</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS7</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00cc</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status7</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS8</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00d0</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status8</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS9</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00d4</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status9</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS10</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00d8</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status10</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS11</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00dc</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status11</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS12</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00e0</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status12</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS13</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00e4</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status13</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS14</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00e8</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status14</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_SD_STATUS_CFG_REG_SD_STATUS15</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x00ec</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_sd_status15</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_reg_sd_status read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0100</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func0</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0104</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func1</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0108</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func2</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x010c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func3</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0110</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func4</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0114</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func5</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0118</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func6</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC7</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x011c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func7</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC8</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0120</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func8</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC9</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0124</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func9</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC10</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0128</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func10</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC11</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x012c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func11</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC12</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0130</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func12</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC13</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0134</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func13</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC14</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0138</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func14</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC15</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x013c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func15</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC16</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0140</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func16</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC17</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0144</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_base_addr_mem_func17</name>
+                            <msb>17</msb>
+                            <bitRange>[17:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_base_addr_mem_func read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0148</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_isdio_interface_code0</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_isdio_interface_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x014c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_isdio_interface_code1</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_isdio_interface_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0150</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_isdio_interface_code2</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_isdio_interface_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0154</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_isdio_interface_code3</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_isdio_interface_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0158</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_isdio_interface_code4</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_isdio_interface_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x015c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_isdio_interface_code5</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_isdio_interface_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0160</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_isdio_interface_code6</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_isdio_interface_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0168</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_manufact_code0</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_manufact_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x016c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_manufact_code1</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_manufact_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0170</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_manufact_code2</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_manufact_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0174</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_manufact_code3</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_manufact_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0178</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_manufact_code4</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_manufact_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x017c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_manufact_code5</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_manufact_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0180</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_manufact_code6</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_manufact_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0188</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_manufact_info0</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_manufact_info read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x018c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_manufact_info1</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_manufact_info read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0190</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_manufact_info2</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_manufact_info read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0194</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_manufact_info3</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_manufact_info read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x0198</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_manufact_info4</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_manufact_info read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x019c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_manufact_info5</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_manufact_info read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01a0</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_manufact_info6</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_manufact_info read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01a8</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_isdio_type_sup_code0</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_isdio_type_sup_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01ac</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_isdio_type_sup_code1</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_isdio_type_sup_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01b0</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_isdio_type_sup_code2</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_isdio_type_sup_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01b4</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_isdio_type_sup_code3</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_isdio_type_sup_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01b8</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_isdio_type_sup_code4</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_isdio_type_sup_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01bc</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_isdio_type_sup_code5</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_isdio_type_sup_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01c0</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_isdio_type_sup_code6</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_isdio_type_sup_code read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01c8</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_info0</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_info read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01cc</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_info1</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_info read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01d0</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_info2</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_info read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01d4</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_info3</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_info read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01d8</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_info4</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_info read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01dc</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_info5</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_info read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01e0</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_func_info6</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_func_info read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_REG_UHS_1_SUPPORT</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ifsub\rtl\sddc.sv]]></description>
+                    <addressOffset>0x01f0</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cfg_reg_max_current</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cfg_reg_max_current read/write control register]]></description>
+                        </field>
+                        <field>
+                            <name>cfg_reg_data_strc_version</name>
+                            <msb>23</msb>
+                            <bitRange>[23:16]</bitRange>
+                            <lsb>16</lsb>
+                            <description><![CDATA[cfg_reg_data_strc_version read/write control register]]></description>
+                        </field>
+                        <field>
+                            <name>cfg_reg_uhs_1_support</name>
+                            <msb>31</msb>
+                            <bitRange>[31:24]</bitRange>
+                            <lsb>24</lsb>
+                            <description><![CDATA[cfg_reg_uhs_1_support read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+            </registers>
+            <addressBlock>
+                <offset>0</offset>
+                <size>0x1f4</size>
+                <usage>registers</usage>
+            </addressBlock>
+        </peripheral>
+        <peripheral>
+            <name>CORESUB_SRAMTRM</name>
+            <baseAddress>0x40014000</baseAddress>
+            <groupName>CORESUB_SRAMTRM</groupName>
+            <registers>
+                <register>
+                    <name>SFR_CACHE</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\coresub_sramtrm.sv]]></description>
+                    <addressOffset>0x0000</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_cache</name>
+                            <msb>2</msb>
+                            <bitRange>[2:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_cache read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_ITCM</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\coresub_sramtrm.sv]]></description>
+                    <addressOffset>0x0004</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_itcm</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_itcm read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_DTCM</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\coresub_sramtrm.sv]]></description>
+                    <addressOffset>0x0008</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_dtcm</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_dtcm read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_SRAM0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\coresub_sramtrm.sv]]></description>
+                    <addressOffset>0x000c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_sram0</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_sram0 read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_SRAM1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\coresub_sramtrm.sv]]></description>
+                    <addressOffset>0x0010</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_sram1</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_sram1 read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_VEXRAM</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\coresub_sramtrm.sv]]></description>
+                    <addressOffset>0x0014</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_vexram</name>
+                            <msb>2</msb>
+                            <bitRange>[2:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_vexram read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_SRAMERR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\coresub_sramtrm.sv]]></description>
+                    <addressOffset>0x0020</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>srambankerr</name>
+                            <msb>3</msb>
+                            <bitRange>[3:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[srambankerr flag register. `1` means event happened, write back `1` in
+respective bit position to clear the flag]]></description>
+                        </field>
+                    </fields>
+                </register>
+            </registers>
+            <addressBlock>
+                <offset>0</offset>
+                <size>0x24</size>
+                <usage>registers</usage>
+            </addressBlock>
+        </peripheral>
+        <peripheral>
+            <name>MDMA</name>
+            <baseAddress>0x40012000</baseAddress>
+            <groupName>MDMA</groupName>
+            <registers>
+                <register>
+                    <name>SFR_EVSEL_CR_EVSEL0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0000</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_evsel0</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_EVSEL_CR_EVSEL1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0004</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_evsel1</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_EVSEL_CR_EVSEL2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0008</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_evsel2</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_EVSEL_CR_EVSEL3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x000c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_evsel3</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_EVSEL_CR_EVSEL4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0010</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_evsel4</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_EVSEL_CR_EVSEL5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0014</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_evsel5</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_EVSEL_CR_EVSEL6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0018</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_evsel6</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_EVSEL_CR_EVSEL7</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x001c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_evsel7</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_evsel read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_CR_CR_MDMAREQ0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0020</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_mdmareq0</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_CR_CR_MDMAREQ1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0024</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_mdmareq1</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_CR_CR_MDMAREQ2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0028</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_mdmareq2</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_CR_CR_MDMAREQ3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x002c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_mdmareq3</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_CR_CR_MDMAREQ4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0030</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_mdmareq4</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_CR_CR_MDMAREQ5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0034</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_mdmareq5</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_CR_CR_MDMAREQ6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0038</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_mdmareq6</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_CR_CR_MDMAREQ7</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x003c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_mdmareq7</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_mdmareq read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_SR_SR_MDMAREQ0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0040</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mdmareq0</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_SR_SR_MDMAREQ1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0044</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mdmareq1</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_SR_SR_MDMAREQ2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0048</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mdmareq2</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_SR_SR_MDMAREQ3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x004c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mdmareq3</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_SR_SR_MDMAREQ4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0050</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mdmareq4</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_SR_SR_MDMAREQ5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0054</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mdmareq5</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_SR_SR_MDMAREQ6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x0058</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mdmareq6</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_SR_SR_MDMAREQ7</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\mdma.sv]]></description>
+                    <addressOffset>0x005c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mdmareq7</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+            </registers>
+            <addressBlock>
+                <offset>0</offset>
+                <size>0x60</size>
+                <usage>registers</usage>
+            </addressBlock>
+        </peripheral>
+        <peripheral>
+            <name>QFC</name>
+            <baseAddress>0x40010000</baseAddress>
+            <groupName>QFC</groupName>
+            <registers>
+                <register>
+                    <name>SFR_IO</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\qfc.sv]]></description>
+                    <addressOffset>0x0000</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_io</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_io read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_AR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\qfc.sv]]></description>
+                    <addressOffset>0x0004</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_ar</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_ar performs action on write of value: 0x5a]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_IODRV</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\qfc.sv]]></description>
+                    <addressOffset>0x0008</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>paddrvsel</name>
+                            <msb>11</msb>
+                            <bitRange>[11:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[paddrvsel read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_XIP_ADDRMODE</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\qfc.sv]]></description>
+                    <addressOffset>0x0010</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_xip_addrmode</name>
+                            <msb>1</msb>
+                            <bitRange>[1:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_xip_addrmode read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_XIP_OPCODE</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\qfc.sv]]></description>
+                    <addressOffset>0x0014</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_xip_opcode</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_xip_opcode read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_XIP_WIDTH</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\qfc.sv]]></description>
+                    <addressOffset>0x0018</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_xip_width</name>
+                            <msb>5</msb>
+                            <bitRange>[5:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_xip_width read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_XIP_SSEL</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\qfc.sv]]></description>
+                    <addressOffset>0x001c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_xip_ssel</name>
+                            <msb>6</msb>
+                            <bitRange>[6:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_xip_ssel read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_XIP_DUMCYC</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\qfc.sv]]></description>
+                    <addressOffset>0x0020</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_xip_dumcyc</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_xip_dumcyc read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_XIP_CFG</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\qfc.sv]]></description>
+                    <addressOffset>0x0024</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_xip_cfg</name>
+                            <msb>14</msb>
+                            <bitRange>[14:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_xip_cfg read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_AESKEY_AESKEYIN0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\qfc.sv]]></description>
+                    <addressOffset>0x0040</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>aeskeyin0</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_aeskey read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_AESKEY_AESKEYIN1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\qfc.sv]]></description>
+                    <addressOffset>0x0044</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>aeskeyin1</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_aeskey read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_AESKEY_AESKEYIN2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\qfc.sv]]></description>
+                    <addressOffset>0x0048</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>aeskeyin2</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_aeskey read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_AESKEY_AESKEYIN3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\qfc.sv]]></description>
+                    <addressOffset>0x004c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>aeskeyin3</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_aeskey read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_AESENA</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\core\rtl\qfc.sv]]></description>
                     <addressOffset>0x0050</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sr_mdmareq4</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cr_aesena</name>
+                            <msb>0</msb>
+                            <bitRange>[0:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_aesena read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+            </registers>
+            <addressBlock>
+                <offset>0</offset>
+                <size>0x54</size>
+                <usage>registers</usage>
+            </addressBlock>
+        </peripheral>
+        <peripheral>
+            <name>MBOX_APB</name>
+            <baseAddress>0x40013000</baseAddress>
+            <groupName>MBOX_APB</groupName>
+            <registers>
+                <register>
+                    <name>SFR_WDATA</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\vexriscv\lib\mbox_v0.1.sv]]></description>
+                    <addressOffset>0x0000</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_wdata</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_wdata read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_RDATA</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\vexriscv\lib\mbox_v0.1.sv]]></description>
+                    <addressOffset>0x0004</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_rdata</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_rdata read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_STATUS</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\vexriscv\lib\mbox_v0.1.sv]]></description>
+                    <addressOffset>0x0008</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>rx_avail</name>
+                            <msb>0</msb>
+                            <bitRange>[0:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[rx_avail read only status register]]></description>
+                        </field>
+                        <field>
+                            <name>tx_free</name>
+                            <msb>1</msb>
+                            <bitRange>[1:1]</bitRange>
+                            <lsb>1</lsb>
+                            <description><![CDATA[tx_free read only status register]]></description>
+                        </field>
+                        <field>
+                            <name>abort_in_progress</name>
+                            <msb>2</msb>
+                            <bitRange>[2:2]</bitRange>
+                            <lsb>2</lsb>
+                            <description><![CDATA[abort_in_progress read only status register]]></description>
+                        </field>
+                        <field>
+                            <name>abort_ack</name>
+                            <msb>3</msb>
+                            <bitRange>[3:3]</bitRange>
+                            <lsb>3</lsb>
+                            <description><![CDATA[abort_ack read only status register]]></description>
+                        </field>
+                        <field>
+                            <name>tx_err</name>
+                            <msb>4</msb>
+                            <bitRange>[4:4]</bitRange>
+                            <lsb>4</lsb>
+                            <description><![CDATA[tx_err read only status register]]></description>
+                        </field>
+                        <field>
+                            <name>rx_err</name>
+                            <msb>5</msb>
+                            <bitRange>[5:5]</bitRange>
+                            <lsb>5</lsb>
+                            <description><![CDATA[rx_err read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_ABORT</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\vexriscv\lib\mbox_v0.1.sv]]></description>
+                    <addressOffset>0x0018</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_abort</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_abort performs action on write of value: 0x1]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_DONE</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\vexriscv\lib\mbox_v0.1.sv]]></description>
+                    <addressOffset>0x001c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_done</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_done performs action on write of value: 0x1]]></description>
+                        </field>
+                    </fields>
+                </register>
+            </registers>
+            <addressBlock>
+                <offset>0</offset>
+                <size>0x20</size>
+                <usage>registers</usage>
+            </addressBlock>
+        </peripheral>
+        <peripheral>
+            <name>RRC</name>
+            <baseAddress>0x40000000</baseAddress>
+            <groupName>RRC</groupName>
+            <registers>
+                <register>
+                    <name>SFR_RRCCR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\rrc\rtl\rrc.sv]]></description>
+                    <addressOffset>0x0000</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_rrccr</name>
+                            <msb>1</msb>
+                            <bitRange>[1:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_rrccr read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_RRCFD</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\rrc\rtl\rrc.sv]]></description>
+                    <addressOffset>0x0004</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_rrcfd</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_rrcfd read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_RRCSR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\rrc\rtl\rrc.sv]]></description>
+                    <addressOffset>0x0008</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_rrcsr</name>
+                            <msb>9</msb>
+                            <bitRange>[9:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_rrcsr read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_RRCFR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\rrc\rtl\rrc.sv]]></description>
+                    <addressOffset>0x000c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_rrcfr</name>
+                            <msb>3</msb>
+                            <bitRange>[3:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_rrcfr flag register. `1` means event happened, write back `1` in respective
+bit position to clear the flag]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_RRCAR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\rrc\rtl\rrc.sv]]></description>
+                    <addressOffset>0x0010</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_rrcar</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_rrcar performs action on write of value: PM_RRAM_SUICIDE]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_RRCSR_SET0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\rrc\rtl\rrc.sv]]></description>
+                    <addressOffset>0x0014</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>trc_set_failure</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[trc_set_failure read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_RRCSR_SET1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\rrc\rtl\rrc.sv]]></description>
+                    <addressOffset>0x0018</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>trc_set_failure</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[trc_set_failure read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_RRCSR_RST0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\rrc\rtl\rrc.sv]]></description>
+                    <addressOffset>0x001c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>trc_reset_failure</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[trc_reset_failure read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_RRCSR_RST1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\rrc\rtl\rrc.sv]]></description>
+                    <addressOffset>0x0020</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>trc_reset_failure</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[trc_reset_failure read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_RRCSR_RD0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\rrc\rtl\rrc.sv]]></description>
+                    <addressOffset>0x0024</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>trc_fourth_read_failure</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[trc_fourth_read_failure read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_RRCSR_RD1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\rrc\rtl\rrc.sv]]></description>
+                    <addressOffset>0x0028</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>trc_fourth_read_failure</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[trc_fourth_read_failure read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+            </registers>
+            <addressBlock>
+                <offset>0</offset>
+                <size>0x2c</size>
+                <usage>registers</usage>
+            </addressBlock>
+        </peripheral>
+        <peripheral>
+            <name>GLUECHAIN</name>
+            <baseAddress>0x40054000</baseAddress>
+            <groupName>GLUECHAIN</groupName>
+            <registers>
+                <register>
+                    <name>SFR_GCMASK</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\gluechain.sv]]></description>
+                    <addressOffset>0x0000</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_gcmask</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_gcmask read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_GCSR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\gluechain.sv]]></description>
+                    <addressOffset>0x0004</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>gluereg</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[gluereg read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_GCRST</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\gluechain.sv]]></description>
+                    <addressOffset>0x0008</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>gluerst</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[gluerst read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_GCTEST</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\gluechain.sv]]></description>
+                    <addressOffset>0x000c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>gluetest</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[gluetest read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+            </registers>
+            <addressBlock>
+                <offset>0</offset>
+                <size>0x10</size>
+                <usage>registers</usage>
+            </addressBlock>
+        </peripheral>
+        <peripheral>
+            <name>MESH</name>
+            <baseAddress>0x40052000</baseAddress>
+            <groupName>MESH</groupName>
+            <registers>
+                <register>
+                    <name>SFR_MLDRV_CR_MLDRV0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\mesh.sv]]></description>
+                    <addressOffset>0x0000</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_mldrv0</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_mldrv read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_MLIE_CR_MLIE0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\mesh.sv]]></description>
+                    <addressOffset>0x0004</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_mlie0</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_mlie read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_MLSR_SR_MLSR0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\mesh.sv]]></description>
+                    <addressOffset>0x0008</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mlsr0</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mlsr read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_MLSR_SR_MLSR1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\mesh.sv]]></description>
+                    <addressOffset>0x000c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mlsr1</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mlsr read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_MLSR_SR_MLSR2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\mesh.sv]]></description>
+                    <addressOffset>0x0010</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mlsr2</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mlsr read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_MLSR_SR_MLSR3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\mesh.sv]]></description>
+                    <addressOffset>0x0014</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mlsr3</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mlsr read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_MLSR_SR_MLSR4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\mesh.sv]]></description>
+                    <addressOffset>0x0018</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mlsr4</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mlsr read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_MLSR_SR_MLSR5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\mesh.sv]]></description>
+                    <addressOffset>0x001c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mlsr5</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mlsr read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_MLSR_SR_MLSR6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\mesh.sv]]></description>
+                    <addressOffset>0x0020</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mlsr6</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mlsr read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_MLSR_SR_MLSR7</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\mesh.sv]]></description>
+                    <addressOffset>0x0024</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_mlsr7</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_mlsr read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+            </registers>
+            <addressBlock>
+                <offset>0</offset>
+                <size>0x28</size>
+                <usage>registers</usage>
+            </addressBlock>
+        </peripheral>
+        <peripheral>
+            <name>SENSORC</name>
+            <baseAddress>0x40053000</baseAddress>
+            <groupName>SENSORC</groupName>
+            <registers>
+                <register>
+                    <name>SFR_VDMASK0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x0000</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_vdmask0</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_vdmask0 read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_VDMASK1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x0004</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_vdmask1</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_vdmask1 read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_VDSR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x0008</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>vdflag</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[vdflag read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_VDFR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x000c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>vdflag</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[vdflag flag register. `1` means event happened, write back `1` in respective bit
+position to clear the flag]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_LDMASK</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x0010</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_ldmask</name>
+                            <msb>3</msb>
+                            <bitRange>[3:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_ldmask read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_LDSR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x0014</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sr_ldsr</name>
+                            <msb>3</msb>
+                            <bitRange>[3:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sr_ldsr read only status register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_LDCFG</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x0018</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_ldcfg</name>
+                            <msb>3</msb>
+                            <bitRange>[3:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_ldcfg read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_VDCFG_CR_VDCFG0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x0020</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_vdcfg0</name>
+                            <msb>3</msb>
+                            <bitRange>[3:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_vdcfg read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_VDCFG_CR_VDCFG1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x0024</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_vdcfg1</name>
+                            <msb>3</msb>
+                            <bitRange>[3:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_vdcfg read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_VDCFG_CR_VDCFG2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x0028</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_vdcfg2</name>
+                            <msb>3</msb>
+                            <bitRange>[3:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_vdcfg read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_VDCFG_CR_VDCFG3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x002c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_vdcfg3</name>
+                            <msb>3</msb>
+                            <bitRange>[3:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_vdcfg read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_VDCFG_CR_VDCFG4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x0030</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_vdcfg4</name>
+                            <msb>3</msb>
+                            <bitRange>[3:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_vdcfg read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_VDCFG_CR_VDCFG5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x0034</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_vdcfg5</name>
+                            <msb>3</msb>
+                            <bitRange>[3:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_vdcfg read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_VDCFG_CR_VDCFG6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x0038</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_vdcfg6</name>
+                            <msb>3</msb>
+                            <bitRange>[3:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                            <description><![CDATA[cr_vdcfg read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_SR_SR_MDMAREQ5</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0054</addressOffset>
+                    <name>SFR_VDCFG_CR_VDCFG7</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x003c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sr_mdmareq5</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>cr_vdcfg7</name>
+                            <msb>3</msb>
+                            <bitRange>[3:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                            <description><![CDATA[cr_vdcfg read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_SR_SR_MDMAREQ6</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x0058</addressOffset>
+                    <name>SFR_VDIP_ENA</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x0040</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sr_mdmareq6</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>vdena</name>
+                            <msb>3</msb>
+                            <bitRange>[3:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                            <description><![CDATA[vdena read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_SR_SR_MDMAREQ7</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/mdma.sv]]></description>
-                    <addressOffset>0x005c</addressOffset>
+                    <name>SFR_VDIP_TEST</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x0044</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sr_mdmareq7</name>
-                            <msb>4</msb>
-                            <bitRange>[4:0]</bitRange>
+                            <name>vdtst</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sr_mdmareq read only status register]]></description>
+                            <description><![CDATA[vdtst read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_LDIP_TEST</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x0048</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>ldtst</name>
+                            <msb>3</msb>
+                            <bitRange>[3:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[ldtst read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_LDIP_FD</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\sec\rtl\sensorc.sv]]></description>
+                    <addressOffset>0x004c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfr_ldip_fd</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfr_ldip_fd read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
             </registers>
             <addressBlock>
                 <offset>0</offset>
-                <size>0x60</size>
+                <size>0x50</size>
                 <usage>registers</usage>
             </addressBlock>
         </peripheral>
         <peripheral>
-            <name>QFC</name>
-            <baseAddress>0x40010000</baseAddress>
-            <groupName>QFC</groupName>
+            <name>AOBUREG</name>
+            <baseAddress>0x40065000</baseAddress>
+            <groupName>AOBUREG</groupName>
             <registers>
                 <register>
-                    <name>SFR_IO</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
+                    <name>SFR_BUREG_CR_BUREGS0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\aobureg.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sfr_io</name>
-                            <msb>7</msb>
-                            <bitRange>[7:0]</bitRange>
+                            <name>cr_buregs0</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sfr_io read/write control register]]></description>
+                            <description><![CDATA[cr_buregs read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_AR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
+                    <name>SFR_BUREG_CR_BUREGS1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\aobureg.sv]]></description>
                     <addressOffset>0x0004</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sfr_ar</name>
+                            <name>cr_buregs1</name>
                             <msb>31</msb>
                             <bitRange>[31:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sfr_ar performs action on write of value: 0x5a]]></description>
+                            <description><![CDATA[cr_buregs read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_IODRV</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
+                    <name>SFR_BUREG_CR_BUREGS2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\aobureg.sv]]></description>
                     <addressOffset>0x0008</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>paddrvsel</name>
-                            <msb>11</msb>
-                            <bitRange>[11:0]</bitRange>
+                            <name>cr_buregs2</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[paddrvsel read/write control register]]></description>
+                            <description><![CDATA[cr_buregs read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>CR_XIP_ADDRMODE</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
+                    <name>SFR_BUREG_CR_BUREGS3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\aobureg.sv]]></description>
+                    <addressOffset>0x000c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_buregs3</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_buregs read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_BUREG_CR_BUREGS4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\aobureg.sv]]></description>
                     <addressOffset>0x0010</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_xip_addrmode</name>
-                            <msb>1</msb>
-                            <bitRange>[1:0]</bitRange>
+                            <name>cr_buregs4</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_xip_addrmode read/write control register]]></description>
+                            <description><![CDATA[cr_buregs read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>CR_XIP_OPCODE</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
+                    <name>SFR_BUREG_CR_BUREGS5</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\aobureg.sv]]></description>
                     <addressOffset>0x0014</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_xip_opcode</name>
+                            <name>cr_buregs5</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_buregs read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_BUREG_CR_BUREGS6</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\aobureg.sv]]></description>
+                    <addressOffset>0x0018</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_buregs6</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_buregs read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_BUREG_CR_BUREGS7</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\aobureg.sv]]></description>
+                    <addressOffset>0x001c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_buregs7</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_buregs read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+            </registers>
+            <addressBlock>
+                <offset>0</offset>
+                <size>0x20</size>
+                <usage>registers</usage>
+            </addressBlock>
+        </peripheral>
+        <peripheral>
+            <name>AO_SYSCTRL</name>
+            <baseAddress>0x40060000</baseAddress>
+            <groupName>AO_SYSCTRL</groupName>
+            <registers>
+                <register>
+                    <name>CR_CLK32KSEL</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x0000</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_clk32ksel</name>
+                            <msb>0</msb>
+                            <bitRange>[0:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_clk32ksel read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_CLK1HZFD</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x0004</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_clk1hzfd</name>
+                            <msb>13</msb>
+                            <bitRange>[13:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_clk1hzfd read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_WKUPMASK</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x0008</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_wkupmask</name>
+                            <msb>9</msb>
+                            <bitRange>[9:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_wkupmask read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>CR_RSTCRMASK</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x000c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>cr_rstcrmask</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[cr_rstcrmask read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_PMUCR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x0010</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfrpmucr</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfrpmucr read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_PMUCRLP</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x0014</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfrpmucrlp</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfrpmucrlp read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_PMUCRPD</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x0018</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfrpmucrpd</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfrpmucrpd read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_PMUDFT</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x001c</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfrpmudft</name>
+                            <msb>5</msb>
+                            <bitRange>[5:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfrpmudft read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_PMUTRM0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x0020</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfrpmutrm</name>
                             <msb>31</msb>
                             <bitRange>[31:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_xip_opcode read/write control register]]></description>
+                            <description><![CDATA[sfrpmutrm read/write control register]]></description>
+                        </field>
+                    </fields>
+                </register>
+                <register>
+                    <name>SFR_PMUTRM1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x0024</addressOffset>
+                    <resetValue>0x00</resetValue>
+                    <size>32</size>
+                    <fields>
+                        <field>
+                            <name>sfrpmutrm</name>
+                            <msb>1</msb>
+                            <bitRange>[1:0]</bitRange>
+                            <lsb>0</lsb>
+                            <description><![CDATA[sfrpmutrm read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>CR_XIP_WIDTH</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
-                    <addressOffset>0x0018</addressOffset>
+                    <name>SFR_PMUTRMLP0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x0028</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_xip_width</name>
-                            <msb>5</msb>
-                            <bitRange>[5:0]</bitRange>
+                            <name>sfrpmutrmlp</name>
+                            <msb>31</msb>
+                            <bitRange>[31:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_xip_width read/write control register]]></description>
+                            <description><![CDATA[sfrpmutrmlp read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>CR_XIP_SSEL</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
-                    <addressOffset>0x001c</addressOffset>
+                    <name>SFR_PMUTRMLP1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x002c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_xip_ssel</name>
-                            <msb>6</msb>
-                            <bitRange>[6:0]</bitRange>
+                            <name>sfrpmutrmlp</name>
+                            <msb>1</msb>
+                            <bitRange>[1:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_xip_ssel read/write control register]]></description>
+                            <description><![CDATA[sfrpmutrmlp read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>CR_XIP_DUMCYC</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
-                    <addressOffset>0x0020</addressOffset>
+                    <name>SFR_OSCCR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x0034</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_xip_dumcyc</name>
-                            <msb>15</msb>
-                            <bitRange>[15:0]</bitRange>
+                            <name>sfrosccr</name>
+                            <msb>0</msb>
+                            <bitRange>[0:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_xip_dumcyc read/write control register]]></description>
+                            <description><![CDATA[sfrosccr read/write control register]]></description>
+                        </field>
+                        <field>
+                            <name>sfrosctrm</name>
+                            <msb>1</msb>
+                            <bitRange>[1:1]</bitRange>
+                            <lsb>1</lsb>
+                            <description><![CDATA[sfrosctrm read/write control register]]></description>
+                        </field>
+                        <field>
+                            <name>sfrosccrlp</name>
+                            <msb>2</msb>
+                            <bitRange>[2:2]</bitRange>
+                            <lsb>2</lsb>
+                            <description><![CDATA[sfrosccrlp read/write control register]]></description>
+                        </field>
+                        <field>
+                            <name>sfrosctrmlp</name>
+                            <msb>3</msb>
+                            <bitRange>[3:3]</bitRange>
+                            <lsb>3</lsb>
+                            <description><![CDATA[sfrosctrmlp read/write control register]]></description>
+                        </field>
+                        <field>
+                            <name>sfrosccrpd</name>
+                            <msb>4</msb>
+                            <bitRange>[4:4]</bitRange>
+                            <lsb>4</lsb>
+                            <description><![CDATA[sfrosccrpd read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>CR_XIP_CFG</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
-                    <addressOffset>0x0024</addressOffset>
+                    <name>SFR_PMUSR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x0038</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_xip_cfg</name>
-                            <msb>14</msb>
-                            <bitRange>[14:0]</bitRange>
+                            <name>sfr_pmusr</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_xip_cfg read/write control register]]></description>
+                            <description><![CDATA[sfr_pmusr read only status register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>CR_AESKEY_AESKEYIN0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
-                    <addressOffset>0x0040</addressOffset>
+                    <name>SFR_PMUFR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x003c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>aeskeyin0</name>
-                            <msb>31</msb>
-                            <bitRange>[31:0]</bitRange>
+                            <name>sfr_pmufr</name>
+                            <msb>4</msb>
+                            <bitRange>[4:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_aeskey read/write control register]]></description>
+                            <description><![CDATA[sfr_pmufr flag register. `1` means event happened, write back `1` in respective
+bit position to clear the flag]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>CR_AESKEY_AESKEYIN1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
-                    <addressOffset>0x0044</addressOffset>
+                    <name>SFR_AOFR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x0040</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>aeskeyin1</name>
-                            <msb>31</msb>
-                            <bitRange>[31:0]</bitRange>
+                            <name>sfr_aofr</name>
+                            <msb>9</msb>
+                            <bitRange>[9:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_aeskey read/write control register]]></description>
+                            <description><![CDATA[sfr_aofr flag register. `1` means event happened, write back `1` in respective
+bit position to clear the flag]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>CR_AESKEY_AESKEYIN2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
-                    <addressOffset>0x0048</addressOffset>
+                    <name>SFR_PMUPDAR</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x0044</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>aeskeyin2</name>
+                            <name>sfr_pmupdar</name>
                             <msb>31</msb>
                             <bitRange>[31:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_aeskey read/write control register]]></description>
+                            <description><![CDATA[sfr_pmupdar performs action on write of value: 0x5a]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>CR_AESKEY_AESKEYIN3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
-                    <addressOffset>0x004c</addressOffset>
+                    <name>AR_AOPERI_CLRINT</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x0050</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>aeskeyin3</name>
+                            <name>ar_aoperi_clrint</name>
                             <msb>31</msb>
                             <bitRange>[31:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_aeskey read/write control register]]></description>
+                            <description><![CDATA[ar_aoperi_clrint performs action on write of value: 0xaa]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>CR_AESENA</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/core/rtl/qfc.sv]]></description>
-                    <addressOffset>0x0050</addressOffset>
+                    <name>SFR_IOX</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\ao_sysctrl.sv]]></description>
+                    <addressOffset>0x0060</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_aesena</name>
+                            <name>sfr_iox</name>
                             <msb>0</msb>
                             <bitRange>[0:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_aesena read/write control register]]></description>
+                            <description><![CDATA[sfr_iox read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
             </registers>
             <addressBlock>
                 <offset>0</offset>
-                <size>0x54</size>
+                <size>0x64</size>
                 <usage>registers</usage>
             </addressBlock>
         </peripheral>
         <peripheral>
-            <name>MBOX_APB</name>
-            <baseAddress>0x40013000</baseAddress>
-            <groupName>MBOX_APB</groupName>
+            <name>DKPC</name>
+            <baseAddress>0x40064000</baseAddress>
+            <groupName>DKPC</groupName>
             <registers>
                 <register>
-                    <name>SFR_WDATA</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/vexriscv/lib/mbox_v0.1.sv]]></description>
+                    <name>SFR_CFG0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\dkpc.sv]]></description>
                     <addressOffset>0x0000</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sfr_wdata</name>
-                            <msb>31</msb>
-                            <bitRange>[31:0]</bitRange>
-                            <lsb>0</lsb>
-                            <description><![CDATA[sfr_wdata read/write control register]]></description>
-                        </field>
-                    </fields>
-                </register>
-                <register>
-                    <name>SFR_RDATA</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/vexriscv/lib/mbox_v0.1.sv]]></description>
-                    <addressOffset>0x0004</addressOffset>
-                    <resetValue>0x00</resetValue>
-                    <size>32</size>
-                    <fields>
-                        <field>
-                            <name>sfr_rdata</name>
-                            <msb>31</msb>
-                            <bitRange>[31:0]</bitRange>
-                            <lsb>0</lsb>
-                            <description><![CDATA[sfr_rdata read only status register]]></description>
-                        </field>
-                    </fields>
-                </register>
-                <register>
-                    <name>SFR_STATUS</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/vexriscv/lib/mbox_v0.1.sv]]></description>
-                    <addressOffset>0x0008</addressOffset>
-                    <resetValue>0x00</resetValue>
-                    <size>32</size>
-                    <fields>
-                        <field>
-                            <name>rx_avail</name>
+                            <name>KPOPO0</name>
                             <msb>0</msb>
                             <bitRange>[0:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[rx_avail read only status register]]></description>
+                            <description><![CDATA[KPOPO0 read/write control register]]></description>
                         </field>
                         <field>
-                            <name>tx_free</name>
+                            <name>KPOPO1</name>
                             <msb>1</msb>
                             <bitRange>[1:1]</bitRange>
                             <lsb>1</lsb>
-                            <description><![CDATA[tx_free read only status register]]></description>
+                            <description><![CDATA[KPOPO1 read/write control register]]></description>
                         </field>
                         <field>
-                            <name>abort_in_progress</name>
+                            <name>KPOOE0</name>
                             <msb>2</msb>
                             <bitRange>[2:2]</bitRange>
                             <lsb>2</lsb>
-                            <description><![CDATA[abort_in_progress read only status register]]></description>
+                            <description><![CDATA[KPOOE0 read/write control register]]></description>
                         </field>
                         <field>
-                            <name>abort_ack</name>
+                            <name>KPOOE1</name>
                             <msb>3</msb>
                             <bitRange>[3:3]</bitRange>
                             <lsb>3</lsb>
-                            <description><![CDATA[abort_ack read only status register]]></description>
+                            <description><![CDATA[KPOOE1 read/write control register]]></description>
                         </field>
                         <field>
-                            <name>tx_err</name>
+                            <name>dkpcen</name>
                             <msb>4</msb>
                             <bitRange>[4:4]</bitRange>
                             <lsb>4</lsb>
-                            <description><![CDATA[tx_err read only status register]]></description>
+                            <description><![CDATA[dkpcen read/write control register]]></description>
                         </field>
                         <field>
-                            <name>rx_err</name>
+                            <name>autosleepen</name>
                             <msb>5</msb>
                             <bitRange>[5:5]</bitRange>
                             <lsb>5</lsb>
-                            <description><![CDATA[rx_err read only status register]]></description>
+                            <description><![CDATA[autosleepen read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_ABORT</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/vexriscv/lib/mbox_v0.1.sv]]></description>
-                    <addressOffset>0x0018</addressOffset>
+                    <name>SFR_CFG1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\dkpc.sv]]></description>
+                    <addressOffset>0x0004</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sfr_abort</name>
-                            <msb>31</msb>
-                            <bitRange>[31:0]</bitRange>
+                            <name>cfg_step</name>
+                            <msb>7</msb>
+                            <bitRange>[7:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sfr_abort performs action on write of value: 0x1]]></description>
+                            <description><![CDATA[cfg_step read/write control register]]></description>
+                        </field>
+                        <field>
+                            <name>cfg_filter</name>
+                            <msb>15</msb>
+                            <bitRange>[15:8]</bitRange>
+                            <lsb>8</lsb>
+                            <description><![CDATA[cfg_filter read/write control register]]></description>
+                        </field>
+                        <field>
+                            <name>cfg_cnt1ms</name>
+                            <msb>23</msb>
+                            <bitRange>[23:16]</bitRange>
+                            <lsb>16</lsb>
+                            <description><![CDATA[cfg_cnt1ms read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_DONE</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/vexriscv/lib/mbox_v0.1.sv]]></description>
-                    <addressOffset>0x001c</addressOffset>
+                    <name>SFR_CFG2</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\dkpc.sv]]></description>
+                    <addressOffset>0x0008</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>sfr_done</name>
+                            <name>cfg_cnt</name>
                             <msb>31</msb>
                             <bitRange>[31:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[sfr_done performs action on write of value: 0x1]]></description>
+                            <description><![CDATA[cfg_cnt read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
-            </registers>
-            <addressBlock>
-                <offset>0</offset>
-                <size>0x20</size>
-                <usage>registers</usage>
-            </addressBlock>
-        </peripheral>
-        <peripheral>
-            <name>GLUECHAIN</name>
-            <baseAddress>0x40054000</baseAddress>
-            <groupName>GLUECHAIN</groupName>
-            <registers>
                 <register>
-                    <name>SFR_GCMASK</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sec/rtl/gluechain.sv]]></description>
-                    <addressOffset>0x0000</addressOffset>
+                    <name>SFR_CFG3</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\dkpc.sv]]></description>
+                    <addressOffset>0x000c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>cr_gcmask</name>
-                            <msb>31</msb>
-                            <bitRange>[31:0]</bitRange>
+                            <name>kpnoderiseen</name>
+                            <msb>0</msb>
+                            <bitRange>[0:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[cr_gcmask read/write control register]]></description>
+                            <description><![CDATA[kpnoderiseen read/write control register]]></description>
+                        </field>
+                        <field>
+                            <name>kpnodefallen</name>
+                            <msb>1</msb>
+                            <bitRange>[1:1]</bitRange>
+                            <lsb>1</lsb>
+                            <description><![CDATA[kpnodefallen read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_GCSR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sec/rtl/gluechain.sv]]></description>
-                    <addressOffset>0x0004</addressOffset>
+                    <name>SFR_SR0</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\dkpc.sv]]></description>
+                    <addressOffset>0x0010</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>gluereg</name>
-                            <msb>31</msb>
-                            <bitRange>[31:0]</bitRange>
+                            <name>kpnodereg</name>
+                            <msb>0</msb>
+                            <bitRange>[0:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[gluereg read only status register]]></description>
+                            <description><![CDATA[kpnodereg read only status register]]></description>
+                        </field>
+                        <field>
+                            <name>kpi0_pi</name>
+                            <msb>1</msb>
+                            <bitRange>[1:1]</bitRange>
+                            <lsb>1</lsb>
+                            <description><![CDATA[kpi[0].pi read only status register]]></description>
+                        </field>
+                        <field>
+                            <name>kpi1_pi</name>
+                            <msb>2</msb>
+                            <bitRange>[2:2]</bitRange>
+                            <lsb>2</lsb>
+                            <description><![CDATA[kpi[1].pi read only status register]]></description>
+                        </field>
+                        <field>
+                            <name>kpi2_pi</name>
+                            <msb>3</msb>
+                            <bitRange>[3:3]</bitRange>
+                            <lsb>3</lsb>
+                            <description><![CDATA[kpi[2].pi read only status register]]></description>
+                        </field>
+                        <field>
+                            <name>kpi3_pi</name>
+                            <msb>4</msb>
+                            <bitRange>[4:4]</bitRange>
+                            <lsb>4</lsb>
+                            <description><![CDATA[kpi[3].pi read only status register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_GCRST</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sec/rtl/gluechain.sv]]></description>
-                    <addressOffset>0x0008</addressOffset>
+                    <name>SFR_SR1</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\dkpc.sv]]></description>
+                    <addressOffset>0x0014</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>gluerst</name>
-                            <msb>31</msb>
-                            <bitRange>[31:0]</bitRange>
+                            <name>sfr_sr1</name>
+                            <msb>0</msb>
+                            <bitRange>[0:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[gluerst read/write control register]]></description>
+                            <description><![CDATA[sfr_sr1 read only status register]]></description>
                         </field>
                     </fields>
                 </register>
                 <register>
-                    <name>SFR_GCTEST</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/sec/rtl/gluechain.sv]]></description>
-                    <addressOffset>0x000c</addressOffset>
+                    <name>SFR_CFG4</name>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\ao\rtl\dkpc.sv]]></description>
+                    <addressOffset>0x0030</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
                     <fields>
                         <field>
-                            <name>gluetest</name>
-                            <msb>31</msb>
-                            <bitRange>[31:0]</bitRange>
+                            <name>sfr_cfg4</name>
+                            <msb>15</msb>
+                            <bitRange>[15:0]</bitRange>
                             <lsb>0</lsb>
-                            <description><![CDATA[gluetest read/write control register]]></description>
+                            <description><![CDATA[sfr_cfg4 read/write control register]]></description>
                         </field>
                     </fields>
                 </register>
             </registers>
             <addressBlock>
                 <offset>0</offset>
-                <size>0x10</size>
+                <size>0x34</size>
                 <usage>registers</usage>
             </addressBlock>
         </peripheral>
@@ -13381,7 +16578,7 @@ respective bit position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFR_FLEVEL</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x000c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13418,7 +16615,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_TXF0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0010</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13434,7 +16631,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_RXF0</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0020</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13450,7 +16647,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EVENT_SET</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0038</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13466,7 +16663,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EVENT_CLR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x003c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13482,7 +16679,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EVENT_STATUS</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0040</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13510,7 +16707,7 @@ respective bit position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFR_FLEVEL</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x000c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13547,7 +16744,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_TXF1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0014</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13563,7 +16760,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_RXF1</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0024</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13579,7 +16776,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EVENT_SET</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0038</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13595,7 +16792,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EVENT_CLR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x003c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13611,7 +16808,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EVENT_STATUS</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0040</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13639,7 +16836,7 @@ respective bit position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFR_FLEVEL</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x000c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13676,7 +16873,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_TXF2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0018</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13692,7 +16889,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_RXF2</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0028</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13708,7 +16905,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EVENT_SET</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0038</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13724,7 +16921,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EVENT_CLR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x003c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13740,7 +16937,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EVENT_STATUS</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0040</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13768,7 +16965,7 @@ respective bit position to clear the flag]]></description>
             <registers>
                 <register>
                     <name>SFR_FLEVEL</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x000c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13805,7 +17002,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_TXF3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x001c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13821,7 +17018,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_RXF3</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x002c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13837,7 +17034,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EVENT_SET</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0038</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13853,7 +17050,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EVENT_CLR</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x003c</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -13869,7 +17066,7 @@ respective bit position to clear the flag]]></description>
                 </register>
                 <register>
                     <name>SFR_EVENT_STATUS</name>
-                    <description><![CDATA[See file:///F:/code/cram-nto/modules/bio_bdma/rtl/bio_bdma.sv]]></description>
+                    <description><![CDATA[See file:///F:/code/cram-nto/modules\bio_bdma\rtl\bio_bdma.sv]]></description>
                     <addressOffset>0x0040</addressOffset>
                     <resetValue>0x00</resetValue>
                     <size>32</size>
@@ -14345,6 +17542,11 @@ respective bit position to clear the flag]]></description>
                 <baseAddress>0x40010000</baseAddress>
                 <size>0x00010000</size>
             </memoryRegion>
+            <memoryRegion>
+                <name>RRC</name>
+                <baseAddress>0x40000000</baseAddress>
+                <size>0x00010000</size>
+            </memoryRegion>
             <memoryRegion>
                 <name>SECSUB</name>
                 <baseAddress>0x40050000</baseAddress>
@@ -14360,6 +17562,16 @@ respective bit position to clear the flag]]></description>
                 <baseAddress>0x50124000</baseAddress>
                 <size>0x00001000</size>
             </memoryRegion>
+            <memoryRegion>
+                <name>AO</name>
+                <baseAddress>0x40060000</baseAddress>
+                <size>0x00010000</size>
+            </memoryRegion>
+            <memoryRegion>
+                <name>AOPERI</name>
+                <baseAddress>0x40061000</baseAddress>
+                <size>0x00003000</size>
+            </memoryRegion>
             <memoryRegion>
                 <name>SEG_LKEY</name>
                 <baseAddress>0x40020000</baseAddress>
@@ -14520,11 +17732,6 @@ respective bit position to clear the flag]]></description>
                 <baseAddress>0x5012F000</baseAddress>
                 <size>0x00001000</size>
             </memoryRegion>
-            <memoryRegion>
-                <name>AOC</name>
-                <baseAddress>0x40060000</baseAddress>
-                <size>0x00001000</size>
-            </memoryRegion>
             <memoryRegion>
                 <name>BIO_IMEM0</name>
                 <baseAddress>0x50125000</baseAddress>
diff --git a/utralib/src/generated/cramium_soc.rs b/utralib/src/generated/cramium_soc.rs
index e9a1402be..55cf9316c 100644
--- a/utralib/src/generated/cramium_soc.rs
+++ b/utralib/src/generated/cramium_soc.rs
@@ -254,12 +254,18 @@ pub const HW_IFSUB_MEM:     usize = 0x50120000;
 pub const HW_IFSUB_MEM_LEN: usize = 12288;
 pub const HW_CORESUB_MEM:     usize = 0x40010000;
 pub const HW_CORESUB_MEM_LEN: usize = 65536;
+pub const HW_RRC_MEM:     usize = 0x40000000;
+pub const HW_RRC_MEM_LEN: usize = 65536;
 pub const HW_SECSUB_MEM:     usize = 0x40050000;
 pub const HW_SECSUB_MEM_LEN: usize = 65536;
 pub const HW_PIO_MEM:     usize = 0x50123000;
 pub const HW_PIO_MEM_LEN: usize = 4096;
 pub const HW_BIO_BDMA_MEM:     usize = 0x50124000;
 pub const HW_BIO_BDMA_MEM_LEN: usize = 4096;
+pub const HW_AO_MEM:     usize = 0x40060000;
+pub const HW_AO_MEM_LEN: usize = 65536;
+pub const HW_AOPERI_MEM:     usize = 0x40061000;
+pub const HW_AOPERI_MEM_LEN: usize = 12288;
 pub const HW_SEG_LKEY_MEM:     usize = 0x40020000;
 pub const HW_SEG_LKEY_MEM_LEN: usize = 256;
 pub const HW_SEG_KEY_MEM:     usize = 0x40020100;
@@ -324,8 +330,6 @@ pub const HW_MBOX_APB_MEM:     usize = 0x40013000;
 pub const HW_MBOX_APB_MEM_LEN: usize = 4096;
 pub const HW_IOX_MEM:     usize = 0x5012f000;
 pub const HW_IOX_MEM_LEN: usize = 4096;
-pub const HW_AOC_MEM:     usize = 0x40060000;
-pub const HW_AOC_MEM_LEN: usize = 4096;
 pub const HW_BIO_IMEM0_MEM:     usize = 0x50125000;
 pub const HW_BIO_IMEM0_MEM_LEN: usize = 4096;
 pub const HW_BIO_IMEM1_MEM:     usize = 0x50126000;
@@ -390,11 +394,18 @@ pub const HW_APB_THRU_BASE :   usize = 0x50122000;
 pub const HW_BIO_BDMA_BASE :   usize = 0x50124000;
 pub const HW_IOX_BASE :   usize = 0x5012f000;
 pub const HW_PWM_BASE :   usize = 0x50120000;
+pub const HW_SDDC_BASE :   usize = 0x50121000;
 pub const HW_CORESUB_SRAMTRM_BASE :   usize = 0x40014000;
 pub const HW_MDMA_BASE :   usize = 0x40012000;
 pub const HW_QFC_BASE :   usize = 0x40010000;
 pub const HW_MBOX_APB_BASE :   usize = 0x40013000;
+pub const HW_RRC_BASE :   usize = 0x40000000;
 pub const HW_GLUECHAIN_BASE :   usize = 0x40054000;
+pub const HW_MESH_BASE :   usize = 0x40052000;
+pub const HW_SENSORC_BASE :   usize = 0x40053000;
+pub const HW_AOBUREG_BASE :   usize = 0x40065000;
+pub const HW_AO_SYSCTRL_BASE :   usize = 0x40060000;
+pub const HW_DKPC_BASE :   usize = 0x40064000;
 pub const HW_UDMA_CTRL_BASE :   usize = 0x50100000;
 pub const HW_UDMA_UART_0_BASE :   usize = 0x50101000;
 pub const HW_UDMA_UART_1_BASE :   usize = 0x50102000;
@@ -2454,8 +2465,8 @@ pub mod utra {
         pub const SFR_SUBEN: crate::Register = crate::Register::new(1, 0xffff);
         pub const SFR_SUBEN_CR_SUBEN: crate::Field = crate::Field::new(16, 0, SFR_SUBEN);
 
-        pub const SFR_AHBS: crate::Register = crate::Register::new(2, 0x1f);
-        pub const SFR_AHBS_CR_AHBSOPT: crate::Field = crate::Field::new(5, 0, SFR_AHBS);
+        pub const SFR_APBS: crate::Register = crate::Register::new(2, 0x1f);
+        pub const SFR_APBS_CR_APBSOPT: crate::Field = crate::Field::new(5, 0, SFR_APBS);
 
         pub const SFR_SRBUSY: crate::Register = crate::Register::new(4, 0xffff);
         pub const SFR_SRBUSY_SR_BUSY: crate::Field = crate::Field::new(16, 0, SFR_SRBUSY);
@@ -3372,6 +3383,351 @@ pub mod utra {
         pub const HW_PWM_BASE: usize = 0x50120000;
     }
 
+    pub mod sddc {
+        pub const SDDC_NUMREGS: usize = 112;
+
+        pub const SFR_IO: crate::Register = crate::Register::new(0, 0x3);
+        pub const SFR_IO_SFR_IO: crate::Field = crate::Field::new(2, 0, SFR_IO);
+
+        pub const SFR_AR: crate::Register = crate::Register::new(1, 0xffffffff);
+        pub const SFR_AR_SFR_AR: crate::Field = crate::Field::new(32, 0, SFR_AR);
+
+        pub const CR_OCR: crate::Register = crate::Register::new(4, 0xffffff);
+        pub const CR_OCR_CR_OCR: crate::Field = crate::Field::new(24, 0, CR_OCR);
+
+        pub const CR_RDFFTHRES: crate::Register = crate::Register::new(5, 0xff);
+        pub const CR_RDFFTHRES_CR_RDFFTHRES: crate::Field = crate::Field::new(8, 0, CR_RDFFTHRES);
+
+        pub const CR_REV: crate::Register = crate::Register::new(6, 0xffff);
+        pub const CR_REV_CFG_REG_SD_SPEC_REVISION: crate::Field = crate::Field::new(8, 0, CR_REV);
+        pub const CR_REV_CFG_REG_CCCR_SDIO_REVISION: crate::Field = crate::Field::new(8, 8, CR_REV);
+
+        pub const CR_BACSA: crate::Register = crate::Register::new(7, 0x3ffff);
+        pub const CR_BACSA_CFG_BASE_ADDR_CSA: crate::Field = crate::Field::new(18, 0, CR_BACSA);
+
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC0: crate::Register = crate::Register::new(8, 0x3ffff);
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC0_CFG_BASE_ADDR_IO_FUNC0: crate::Field = crate::Field::new(18, 0, CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC0);
+
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC1: crate::Register = crate::Register::new(9, 0x3ffff);
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC1_CFG_BASE_ADDR_IO_FUNC1: crate::Field = crate::Field::new(18, 0, CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC1);
+
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC2: crate::Register = crate::Register::new(10, 0x3ffff);
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC2_CFG_BASE_ADDR_IO_FUNC2: crate::Field = crate::Field::new(18, 0, CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC2);
+
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC3: crate::Register = crate::Register::new(11, 0x3ffff);
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC3_CFG_BASE_ADDR_IO_FUNC3: crate::Field = crate::Field::new(18, 0, CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC3);
+
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC4: crate::Register = crate::Register::new(12, 0x3ffff);
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC4_CFG_BASE_ADDR_IO_FUNC4: crate::Field = crate::Field::new(18, 0, CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC4);
+
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC5: crate::Register = crate::Register::new(13, 0x3ffff);
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC5_CFG_BASE_ADDR_IO_FUNC5: crate::Field = crate::Field::new(18, 0, CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC5);
+
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC6: crate::Register = crate::Register::new(14, 0x3ffff);
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC6_CFG_BASE_ADDR_IO_FUNC6: crate::Field = crate::Field::new(18, 0, CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC6);
+
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC7: crate::Register = crate::Register::new(15, 0x3ffff);
+        pub const CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC7_CFG_BASE_ADDR_IO_FUNC7: crate::Field = crate::Field::new(18, 0, CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC7);
+
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR0: crate::Register = crate::Register::new(16, 0x1ffff);
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR0_CFG_REG_FUNC_CIS_PTR0: crate::Field = crate::Field::new(17, 0, CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR0);
+
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR1: crate::Register = crate::Register::new(17, 0x1ffff);
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR1_CFG_REG_FUNC_CIS_PTR1: crate::Field = crate::Field::new(17, 0, CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR1);
+
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR2: crate::Register = crate::Register::new(18, 0x1ffff);
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR2_CFG_REG_FUNC_CIS_PTR2: crate::Field = crate::Field::new(17, 0, CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR2);
+
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR3: crate::Register = crate::Register::new(19, 0x1ffff);
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR3_CFG_REG_FUNC_CIS_PTR3: crate::Field = crate::Field::new(17, 0, CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR3);
+
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR4: crate::Register = crate::Register::new(20, 0x1ffff);
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR4_CFG_REG_FUNC_CIS_PTR4: crate::Field = crate::Field::new(17, 0, CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR4);
+
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR5: crate::Register = crate::Register::new(21, 0x1ffff);
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR5_CFG_REG_FUNC_CIS_PTR5: crate::Field = crate::Field::new(17, 0, CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR5);
+
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR6: crate::Register = crate::Register::new(22, 0x1ffff);
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR6_CFG_REG_FUNC_CIS_PTR6: crate::Field = crate::Field::new(17, 0, CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR6);
+
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR7: crate::Register = crate::Register::new(23, 0x1ffff);
+        pub const CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR7_CFG_REG_FUNC_CIS_PTR7: crate::Field = crate::Field::new(17, 0, CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR7);
+
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE0: crate::Register = crate::Register::new(24, 0xff);
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE0_CFG_REG_FUNC_EXT_STD_CODE0: crate::Field = crate::Field::new(8, 0, CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE0);
+
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE1: crate::Register = crate::Register::new(25, 0xff);
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE1_CFG_REG_FUNC_EXT_STD_CODE1: crate::Field = crate::Field::new(8, 0, CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE1);
+
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE2: crate::Register = crate::Register::new(26, 0xff);
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE2_CFG_REG_FUNC_EXT_STD_CODE2: crate::Field = crate::Field::new(8, 0, CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE2);
+
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE3: crate::Register = crate::Register::new(27, 0xff);
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE3_CFG_REG_FUNC_EXT_STD_CODE3: crate::Field = crate::Field::new(8, 0, CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE3);
+
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE4: crate::Register = crate::Register::new(28, 0xff);
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE4_CFG_REG_FUNC_EXT_STD_CODE4: crate::Field = crate::Field::new(8, 0, CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE4);
+
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE5: crate::Register = crate::Register::new(29, 0xff);
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE5_CFG_REG_FUNC_EXT_STD_CODE5: crate::Field = crate::Field::new(8, 0, CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE5);
+
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE6: crate::Register = crate::Register::new(30, 0xff);
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE6_CFG_REG_FUNC_EXT_STD_CODE6: crate::Field = crate::Field::new(8, 0, CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE6);
+
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE7: crate::Register = crate::Register::new(31, 0xff);
+        pub const CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE7_CFG_REG_FUNC_EXT_STD_CODE7: crate::Field = crate::Field::new(8, 0, CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE7);
+
+        pub const CR_WRITE_PROTECT: crate::Register = crate::Register::new(32, 0x1);
+        pub const CR_WRITE_PROTECT_CR_WRITE_PROTECT: crate::Field = crate::Field::new(1, 0, CR_WRITE_PROTECT);
+
+        pub const CR_REG_DSR: crate::Register = crate::Register::new(33, 0xffff);
+        pub const CR_REG_DSR_CR_REG_DSR: crate::Field = crate::Field::new(16, 0, CR_REG_DSR);
+
+        pub const CR_REG_CID_CFG_REG_CID0: crate::Register = crate::Register::new(34, 0xffffffff);
+        pub const CR_REG_CID_CFG_REG_CID0_CFG_REG_CID0: crate::Field = crate::Field::new(32, 0, CR_REG_CID_CFG_REG_CID0);
+
+        pub const CR_REG_CID_CFG_REG_CID1: crate::Register = crate::Register::new(35, 0xffffffff);
+        pub const CR_REG_CID_CFG_REG_CID1_CFG_REG_CID1: crate::Field = crate::Field::new(32, 0, CR_REG_CID_CFG_REG_CID1);
+
+        pub const CR_REG_CID_CFG_REG_CID2: crate::Register = crate::Register::new(36, 0xffffffff);
+        pub const CR_REG_CID_CFG_REG_CID2_CFG_REG_CID2: crate::Field = crate::Field::new(32, 0, CR_REG_CID_CFG_REG_CID2);
+
+        pub const CR_REG_CID_CFG_REG_CID3: crate::Register = crate::Register::new(37, 0xffffffff);
+        pub const CR_REG_CID_CFG_REG_CID3_CFG_REG_CID3: crate::Field = crate::Field::new(32, 0, CR_REG_CID_CFG_REG_CID3);
+
+        pub const CR_REG_CSD_CFG_REG_CSD0: crate::Register = crate::Register::new(38, 0xffffffff);
+        pub const CR_REG_CSD_CFG_REG_CSD0_CFG_REG_CSD0: crate::Field = crate::Field::new(32, 0, CR_REG_CSD_CFG_REG_CSD0);
+
+        pub const CR_REG_CSD_CFG_REG_CSD1: crate::Register = crate::Register::new(39, 0xffffffff);
+        pub const CR_REG_CSD_CFG_REG_CSD1_CFG_REG_CSD1: crate::Field = crate::Field::new(32, 0, CR_REG_CSD_CFG_REG_CSD1);
+
+        pub const CR_REG_CSD_CFG_REG_CSD2: crate::Register = crate::Register::new(40, 0xffffffff);
+        pub const CR_REG_CSD_CFG_REG_CSD2_CFG_REG_CSD2: crate::Field = crate::Field::new(32, 0, CR_REG_CSD_CFG_REG_CSD2);
+
+        pub const CR_REG_CSD_CFG_REG_CSD3: crate::Register = crate::Register::new(41, 0xffffffff);
+        pub const CR_REG_CSD_CFG_REG_CSD3_CFG_REG_CSD3: crate::Field = crate::Field::new(32, 0, CR_REG_CSD_CFG_REG_CSD3);
+
+        pub const CR_REG_SCR_CFG_REG_SCR0: crate::Register = crate::Register::new(42, 0xffffffff);
+        pub const CR_REG_SCR_CFG_REG_SCR0_CFG_REG_SCR0: crate::Field = crate::Field::new(32, 0, CR_REG_SCR_CFG_REG_SCR0);
+
+        pub const CR_REG_SCR_CFG_REG_SCR1: crate::Register = crate::Register::new(43, 0xffffffff);
+        pub const CR_REG_SCR_CFG_REG_SCR1_CFG_REG_SCR1: crate::Field = crate::Field::new(32, 0, CR_REG_SCR_CFG_REG_SCR1);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS0: crate::Register = crate::Register::new(44, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS0_CFG_REG_SD_STATUS0: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS0);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS1: crate::Register = crate::Register::new(45, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS1_CFG_REG_SD_STATUS1: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS1);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS2: crate::Register = crate::Register::new(46, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS2_CFG_REG_SD_STATUS2: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS2);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS3: crate::Register = crate::Register::new(47, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS3_CFG_REG_SD_STATUS3: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS3);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS4: crate::Register = crate::Register::new(48, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS4_CFG_REG_SD_STATUS4: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS4);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS5: crate::Register = crate::Register::new(49, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS5_CFG_REG_SD_STATUS5: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS5);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS6: crate::Register = crate::Register::new(50, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS6_CFG_REG_SD_STATUS6: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS6);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS7: crate::Register = crate::Register::new(51, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS7_CFG_REG_SD_STATUS7: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS7);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS8: crate::Register = crate::Register::new(52, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS8_CFG_REG_SD_STATUS8: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS8);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS9: crate::Register = crate::Register::new(53, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS9_CFG_REG_SD_STATUS9: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS9);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS10: crate::Register = crate::Register::new(54, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS10_CFG_REG_SD_STATUS10: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS10);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS11: crate::Register = crate::Register::new(55, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS11_CFG_REG_SD_STATUS11: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS11);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS12: crate::Register = crate::Register::new(56, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS12_CFG_REG_SD_STATUS12: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS12);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS13: crate::Register = crate::Register::new(57, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS13_CFG_REG_SD_STATUS13: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS13);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS14: crate::Register = crate::Register::new(58, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS14_CFG_REG_SD_STATUS14: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS14);
+
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS15: crate::Register = crate::Register::new(59, 0xffffffff);
+        pub const CR_REG_SD_STATUS_CFG_REG_SD_STATUS15_CFG_REG_SD_STATUS15: crate::Field = crate::Field::new(32, 0, CR_REG_SD_STATUS_CFG_REG_SD_STATUS15);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC0: crate::Register = crate::Register::new(64, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC0_CFG_BASE_ADDR_MEM_FUNC0: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC0);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC1: crate::Register = crate::Register::new(65, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC1_CFG_BASE_ADDR_MEM_FUNC1: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC1);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC2: crate::Register = crate::Register::new(66, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC2_CFG_BASE_ADDR_MEM_FUNC2: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC2);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC3: crate::Register = crate::Register::new(67, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC3_CFG_BASE_ADDR_MEM_FUNC3: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC3);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC4: crate::Register = crate::Register::new(68, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC4_CFG_BASE_ADDR_MEM_FUNC4: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC4);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC5: crate::Register = crate::Register::new(69, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC5_CFG_BASE_ADDR_MEM_FUNC5: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC5);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC6: crate::Register = crate::Register::new(70, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC6_CFG_BASE_ADDR_MEM_FUNC6: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC6);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC7: crate::Register = crate::Register::new(71, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC7_CFG_BASE_ADDR_MEM_FUNC7: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC7);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC8: crate::Register = crate::Register::new(72, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC8_CFG_BASE_ADDR_MEM_FUNC8: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC8);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC9: crate::Register = crate::Register::new(73, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC9_CFG_BASE_ADDR_MEM_FUNC9: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC9);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC10: crate::Register = crate::Register::new(74, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC10_CFG_BASE_ADDR_MEM_FUNC10: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC10);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC11: crate::Register = crate::Register::new(75, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC11_CFG_BASE_ADDR_MEM_FUNC11: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC11);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC12: crate::Register = crate::Register::new(76, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC12_CFG_BASE_ADDR_MEM_FUNC12: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC12);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC13: crate::Register = crate::Register::new(77, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC13_CFG_BASE_ADDR_MEM_FUNC13: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC13);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC14: crate::Register = crate::Register::new(78, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC14_CFG_BASE_ADDR_MEM_FUNC14: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC14);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC15: crate::Register = crate::Register::new(79, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC15_CFG_BASE_ADDR_MEM_FUNC15: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC15);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC16: crate::Register = crate::Register::new(80, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC16_CFG_BASE_ADDR_MEM_FUNC16: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC16);
+
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC17: crate::Register = crate::Register::new(81, 0x3ffff);
+        pub const CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC17_CFG_BASE_ADDR_MEM_FUNC17: crate::Field = crate::Field::new(18, 0, CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC17);
+
+        pub const CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0: crate::Register = crate::Register::new(82, 0xff);
+        pub const CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0: crate::Field = crate::Field::new(8, 0, CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0);
+
+        pub const CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1: crate::Register = crate::Register::new(83, 0xff);
+        pub const CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1: crate::Field = crate::Field::new(8, 0, CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1);
+
+        pub const CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2: crate::Register = crate::Register::new(84, 0xff);
+        pub const CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2: crate::Field = crate::Field::new(8, 0, CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2);
+
+        pub const CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3: crate::Register = crate::Register::new(85, 0xff);
+        pub const CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3: crate::Field = crate::Field::new(8, 0, CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3);
+
+        pub const CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4: crate::Register = crate::Register::new(86, 0xff);
+        pub const CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4: crate::Field = crate::Field::new(8, 0, CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4);
+
+        pub const CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5: crate::Register = crate::Register::new(87, 0xff);
+        pub const CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5: crate::Field = crate::Field::new(8, 0, CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5);
+
+        pub const CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6: crate::Register = crate::Register::new(88, 0xff);
+        pub const CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6: crate::Field = crate::Field::new(8, 0, CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6);
+
+        pub const CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE0: crate::Register = crate::Register::new(90, 0xffff);
+        pub const CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE0_CFG_REG_FUNC_MANUFACT_CODE0: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE0);
+
+        pub const CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE1: crate::Register = crate::Register::new(91, 0xffff);
+        pub const CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE1_CFG_REG_FUNC_MANUFACT_CODE1: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE1);
+
+        pub const CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE2: crate::Register = crate::Register::new(92, 0xffff);
+        pub const CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE2_CFG_REG_FUNC_MANUFACT_CODE2: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE2);
+
+        pub const CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE3: crate::Register = crate::Register::new(93, 0xffff);
+        pub const CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE3_CFG_REG_FUNC_MANUFACT_CODE3: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE3);
+
+        pub const CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE4: crate::Register = crate::Register::new(94, 0xffff);
+        pub const CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE4_CFG_REG_FUNC_MANUFACT_CODE4: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE4);
+
+        pub const CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE5: crate::Register = crate::Register::new(95, 0xffff);
+        pub const CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE5_CFG_REG_FUNC_MANUFACT_CODE5: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE5);
+
+        pub const CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE6: crate::Register = crate::Register::new(96, 0xffff);
+        pub const CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE6_CFG_REG_FUNC_MANUFACT_CODE6: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE6);
+
+        pub const CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO0: crate::Register = crate::Register::new(98, 0xffff);
+        pub const CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO0_CFG_REG_FUNC_MANUFACT_INFO0: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO0);
+
+        pub const CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO1: crate::Register = crate::Register::new(99, 0xffff);
+        pub const CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO1_CFG_REG_FUNC_MANUFACT_INFO1: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO1);
+
+        pub const CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO2: crate::Register = crate::Register::new(100, 0xffff);
+        pub const CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO2_CFG_REG_FUNC_MANUFACT_INFO2: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO2);
+
+        pub const CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO3: crate::Register = crate::Register::new(101, 0xffff);
+        pub const CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO3_CFG_REG_FUNC_MANUFACT_INFO3: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO3);
+
+        pub const CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO4: crate::Register = crate::Register::new(102, 0xffff);
+        pub const CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO4_CFG_REG_FUNC_MANUFACT_INFO4: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO4);
+
+        pub const CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO5: crate::Register = crate::Register::new(103, 0xffff);
+        pub const CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO5_CFG_REG_FUNC_MANUFACT_INFO5: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO5);
+
+        pub const CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO6: crate::Register = crate::Register::new(104, 0xffff);
+        pub const CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO6_CFG_REG_FUNC_MANUFACT_INFO6: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO6);
+
+        pub const CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0: crate::Register = crate::Register::new(106, 0xff);
+        pub const CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0: crate::Field = crate::Field::new(8, 0, CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0);
+
+        pub const CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1: crate::Register = crate::Register::new(107, 0xff);
+        pub const CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1: crate::Field = crate::Field::new(8, 0, CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1);
+
+        pub const CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2: crate::Register = crate::Register::new(108, 0xff);
+        pub const CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2: crate::Field = crate::Field::new(8, 0, CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2);
+
+        pub const CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3: crate::Register = crate::Register::new(109, 0xff);
+        pub const CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3: crate::Field = crate::Field::new(8, 0, CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3);
+
+        pub const CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4: crate::Register = crate::Register::new(110, 0xff);
+        pub const CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4: crate::Field = crate::Field::new(8, 0, CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4);
+
+        pub const CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5: crate::Register = crate::Register::new(111, 0xff);
+        pub const CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5: crate::Field = crate::Field::new(8, 0, CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5);
+
+        pub const CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6: crate::Register = crate::Register::new(112, 0xff);
+        pub const CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6: crate::Field = crate::Field::new(8, 0, CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6);
+
+        pub const CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO0: crate::Register = crate::Register::new(114, 0xffff);
+        pub const CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO0_CFG_REG_FUNC_INFO0: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO0);
+
+        pub const CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO1: crate::Register = crate::Register::new(115, 0xffff);
+        pub const CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO1_CFG_REG_FUNC_INFO1: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO1);
+
+        pub const CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO2: crate::Register = crate::Register::new(116, 0xffff);
+        pub const CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO2_CFG_REG_FUNC_INFO2: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO2);
+
+        pub const CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO3: crate::Register = crate::Register::new(117, 0xffff);
+        pub const CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO3_CFG_REG_FUNC_INFO3: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO3);
+
+        pub const CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO4: crate::Register = crate::Register::new(118, 0xffff);
+        pub const CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO4_CFG_REG_FUNC_INFO4: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO4);
+
+        pub const CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO5: crate::Register = crate::Register::new(119, 0xffff);
+        pub const CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO5_CFG_REG_FUNC_INFO5: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO5);
+
+        pub const CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO6: crate::Register = crate::Register::new(120, 0xffff);
+        pub const CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO6_CFG_REG_FUNC_INFO6: crate::Field = crate::Field::new(16, 0, CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO6);
+
+        pub const CR_REG_UHS_1_SUPPORT: crate::Register = crate::Register::new(124, 0xffffffff);
+        pub const CR_REG_UHS_1_SUPPORT_CFG_REG_MAX_CURRENT: crate::Field = crate::Field::new(16, 0, CR_REG_UHS_1_SUPPORT);
+        pub const CR_REG_UHS_1_SUPPORT_CFG_REG_DATA_STRC_VERSION: crate::Field = crate::Field::new(8, 16, CR_REG_UHS_1_SUPPORT);
+        pub const CR_REG_UHS_1_SUPPORT_CFG_REG_UHS_1_SUPPORT: crate::Field = crate::Field::new(8, 24, CR_REG_UHS_1_SUPPORT);
+
+        pub const HW_SDDC_BASE: usize = 0x50121000;
+    }
+
     pub mod coresub_sramtrm {
         pub const CORESUB_SRAMTRM_NUMREGS: usize = 7;
 
@@ -3551,6 +3907,45 @@ pub mod utra {
         pub const HW_MBOX_APB_BASE: usize = 0x40013000;
     }
 
+    pub mod rrc {
+        pub const RRC_NUMREGS: usize = 11;
+
+        pub const SFR_RRCCR: crate::Register = crate::Register::new(0, 0x3);
+        pub const SFR_RRCCR_SFR_RRCCR: crate::Field = crate::Field::new(2, 0, SFR_RRCCR);
+
+        pub const SFR_RRCFD: crate::Register = crate::Register::new(1, 0x1f);
+        pub const SFR_RRCFD_SFR_RRCFD: crate::Field = crate::Field::new(5, 0, SFR_RRCFD);
+
+        pub const SFR_RRCSR: crate::Register = crate::Register::new(2, 0x3ff);
+        pub const SFR_RRCSR_SFR_RRCSR: crate::Field = crate::Field::new(10, 0, SFR_RRCSR);
+
+        pub const SFR_RRCFR: crate::Register = crate::Register::new(3, 0xf);
+        pub const SFR_RRCFR_SFR_RRCFR: crate::Field = crate::Field::new(4, 0, SFR_RRCFR);
+
+        pub const SFR_RRCAR: crate::Register = crate::Register::new(4, 0xffffffff);
+        pub const SFR_RRCAR_SFR_RRCAR: crate::Field = crate::Field::new(32, 0, SFR_RRCAR);
+
+        pub const SFR_RRCSR_SET0: crate::Register = crate::Register::new(5, 0xffffffff);
+        pub const SFR_RRCSR_SET0_TRC_SET_FAILURE: crate::Field = crate::Field::new(32, 0, SFR_RRCSR_SET0);
+
+        pub const SFR_RRCSR_SET1: crate::Register = crate::Register::new(6, 0xffffffff);
+        pub const SFR_RRCSR_SET1_TRC_SET_FAILURE: crate::Field = crate::Field::new(32, 0, SFR_RRCSR_SET1);
+
+        pub const SFR_RRCSR_RST0: crate::Register = crate::Register::new(7, 0xffffffff);
+        pub const SFR_RRCSR_RST0_TRC_RESET_FAILURE: crate::Field = crate::Field::new(32, 0, SFR_RRCSR_RST0);
+
+        pub const SFR_RRCSR_RST1: crate::Register = crate::Register::new(8, 0xffffffff);
+        pub const SFR_RRCSR_RST1_TRC_RESET_FAILURE: crate::Field = crate::Field::new(32, 0, SFR_RRCSR_RST1);
+
+        pub const SFR_RRCSR_RD0: crate::Register = crate::Register::new(9, 0xffffffff);
+        pub const SFR_RRCSR_RD0_TRC_FOURTH_READ_FAILURE: crate::Field = crate::Field::new(32, 0, SFR_RRCSR_RD0);
+
+        pub const SFR_RRCSR_RD1: crate::Register = crate::Register::new(10, 0xffffffff);
+        pub const SFR_RRCSR_RD1_TRC_FOURTH_READ_FAILURE: crate::Field = crate::Field::new(32, 0, SFR_RRCSR_RD1);
+
+        pub const HW_RRC_BASE: usize = 0x40000000;
+    }
+
     pub mod gluechain {
         pub const GLUECHAIN_NUMREGS: usize = 4;
 
@@ -3569,6 +3964,241 @@ pub mod utra {
         pub const HW_GLUECHAIN_BASE: usize = 0x40054000;
     }
 
+    pub mod mesh {
+        pub const MESH_NUMREGS: usize = 10;
+
+        pub const SFR_MLDRV_CR_MLDRV0: crate::Register = crate::Register::new(0, 0xffffffff);
+        pub const SFR_MLDRV_CR_MLDRV0_CR_MLDRV0: crate::Field = crate::Field::new(32, 0, SFR_MLDRV_CR_MLDRV0);
+
+        pub const SFR_MLIE_CR_MLIE0: crate::Register = crate::Register::new(1, 0xffffffff);
+        pub const SFR_MLIE_CR_MLIE0_CR_MLIE0: crate::Field = crate::Field::new(32, 0, SFR_MLIE_CR_MLIE0);
+
+        pub const SFR_MLSR_SR_MLSR0: crate::Register = crate::Register::new(2, 0xffffffff);
+        pub const SFR_MLSR_SR_MLSR0_SR_MLSR0: crate::Field = crate::Field::new(32, 0, SFR_MLSR_SR_MLSR0);
+
+        pub const SFR_MLSR_SR_MLSR1: crate::Register = crate::Register::new(3, 0xffffffff);
+        pub const SFR_MLSR_SR_MLSR1_SR_MLSR1: crate::Field = crate::Field::new(32, 0, SFR_MLSR_SR_MLSR1);
+
+        pub const SFR_MLSR_SR_MLSR2: crate::Register = crate::Register::new(4, 0xffffffff);
+        pub const SFR_MLSR_SR_MLSR2_SR_MLSR2: crate::Field = crate::Field::new(32, 0, SFR_MLSR_SR_MLSR2);
+
+        pub const SFR_MLSR_SR_MLSR3: crate::Register = crate::Register::new(5, 0xffffffff);
+        pub const SFR_MLSR_SR_MLSR3_SR_MLSR3: crate::Field = crate::Field::new(32, 0, SFR_MLSR_SR_MLSR3);
+
+        pub const SFR_MLSR_SR_MLSR4: crate::Register = crate::Register::new(6, 0xffffffff);
+        pub const SFR_MLSR_SR_MLSR4_SR_MLSR4: crate::Field = crate::Field::new(32, 0, SFR_MLSR_SR_MLSR4);
+
+        pub const SFR_MLSR_SR_MLSR5: crate::Register = crate::Register::new(7, 0xffffffff);
+        pub const SFR_MLSR_SR_MLSR5_SR_MLSR5: crate::Field = crate::Field::new(32, 0, SFR_MLSR_SR_MLSR5);
+
+        pub const SFR_MLSR_SR_MLSR6: crate::Register = crate::Register::new(8, 0xffffffff);
+        pub const SFR_MLSR_SR_MLSR6_SR_MLSR6: crate::Field = crate::Field::new(32, 0, SFR_MLSR_SR_MLSR6);
+
+        pub const SFR_MLSR_SR_MLSR7: crate::Register = crate::Register::new(9, 0xffffffff);
+        pub const SFR_MLSR_SR_MLSR7_SR_MLSR7: crate::Field = crate::Field::new(32, 0, SFR_MLSR_SR_MLSR7);
+
+        pub const HW_MESH_BASE: usize = 0x40052000;
+    }
+
+    pub mod sensorc {
+        pub const SENSORC_NUMREGS: usize = 19;
+
+        pub const SFR_VDMASK0: crate::Register = crate::Register::new(0, 0xff);
+        pub const SFR_VDMASK0_CR_VDMASK0: crate::Field = crate::Field::new(8, 0, SFR_VDMASK0);
+
+        pub const SFR_VDMASK1: crate::Register = crate::Register::new(1, 0xff);
+        pub const SFR_VDMASK1_CR_VDMASK1: crate::Field = crate::Field::new(8, 0, SFR_VDMASK1);
+
+        pub const SFR_VDSR: crate::Register = crate::Register::new(2, 0xff);
+        pub const SFR_VDSR_VDFLAG: crate::Field = crate::Field::new(8, 0, SFR_VDSR);
+
+        pub const SFR_VDFR: crate::Register = crate::Register::new(3, 0xff);
+        pub const SFR_VDFR_VDFLAG: crate::Field = crate::Field::new(8, 0, SFR_VDFR);
+
+        pub const SFR_LDMASK: crate::Register = crate::Register::new(4, 0xf);
+        pub const SFR_LDMASK_CR_LDMASK: crate::Field = crate::Field::new(4, 0, SFR_LDMASK);
+
+        pub const SFR_LDSR: crate::Register = crate::Register::new(5, 0xf);
+        pub const SFR_LDSR_SR_LDSR: crate::Field = crate::Field::new(4, 0, SFR_LDSR);
+
+        pub const SFR_LDCFG: crate::Register = crate::Register::new(6, 0xf);
+        pub const SFR_LDCFG_SFR_LDCFG: crate::Field = crate::Field::new(4, 0, SFR_LDCFG);
+
+        pub const SFR_VDCFG_CR_VDCFG0: crate::Register = crate::Register::new(8, 0xf);
+        pub const SFR_VDCFG_CR_VDCFG0_CR_VDCFG0: crate::Field = crate::Field::new(4, 0, SFR_VDCFG_CR_VDCFG0);
+
+        pub const SFR_VDCFG_CR_VDCFG1: crate::Register = crate::Register::new(9, 0xf);
+        pub const SFR_VDCFG_CR_VDCFG1_CR_VDCFG1: crate::Field = crate::Field::new(4, 0, SFR_VDCFG_CR_VDCFG1);
+
+        pub const SFR_VDCFG_CR_VDCFG2: crate::Register = crate::Register::new(10, 0xf);
+        pub const SFR_VDCFG_CR_VDCFG2_CR_VDCFG2: crate::Field = crate::Field::new(4, 0, SFR_VDCFG_CR_VDCFG2);
+
+        pub const SFR_VDCFG_CR_VDCFG3: crate::Register = crate::Register::new(11, 0xf);
+        pub const SFR_VDCFG_CR_VDCFG3_CR_VDCFG3: crate::Field = crate::Field::new(4, 0, SFR_VDCFG_CR_VDCFG3);
+
+        pub const SFR_VDCFG_CR_VDCFG4: crate::Register = crate::Register::new(12, 0xf);
+        pub const SFR_VDCFG_CR_VDCFG4_CR_VDCFG4: crate::Field = crate::Field::new(4, 0, SFR_VDCFG_CR_VDCFG4);
+
+        pub const SFR_VDCFG_CR_VDCFG5: crate::Register = crate::Register::new(13, 0xf);
+        pub const SFR_VDCFG_CR_VDCFG5_CR_VDCFG5: crate::Field = crate::Field::new(4, 0, SFR_VDCFG_CR_VDCFG5);
+
+        pub const SFR_VDCFG_CR_VDCFG6: crate::Register = crate::Register::new(14, 0xf);
+        pub const SFR_VDCFG_CR_VDCFG6_CR_VDCFG6: crate::Field = crate::Field::new(4, 0, SFR_VDCFG_CR_VDCFG6);
+
+        pub const SFR_VDCFG_CR_VDCFG7: crate::Register = crate::Register::new(15, 0xf);
+        pub const SFR_VDCFG_CR_VDCFG7_CR_VDCFG7: crate::Field = crate::Field::new(4, 0, SFR_VDCFG_CR_VDCFG7);
+
+        pub const SFR_VDIP_ENA: crate::Register = crate::Register::new(16, 0xf);
+        pub const SFR_VDIP_ENA_VDENA: crate::Field = crate::Field::new(4, 0, SFR_VDIP_ENA);
+
+        pub const SFR_VDIP_TEST: crate::Register = crate::Register::new(17, 0xff);
+        pub const SFR_VDIP_TEST_VDTST: crate::Field = crate::Field::new(8, 0, SFR_VDIP_TEST);
+
+        pub const SFR_LDIP_TEST: crate::Register = crate::Register::new(18, 0xf);
+        pub const SFR_LDIP_TEST_LDTST: crate::Field = crate::Field::new(4, 0, SFR_LDIP_TEST);
+
+        pub const SFR_LDIP_FD: crate::Register = crate::Register::new(19, 0xffff);
+        pub const SFR_LDIP_FD_SFR_LDIP_FD: crate::Field = crate::Field::new(16, 0, SFR_LDIP_FD);
+
+        pub const HW_SENSORC_BASE: usize = 0x40053000;
+    }
+
+    pub mod aobureg {
+        pub const AOBUREG_NUMREGS: usize = 8;
+
+        pub const SFR_BUREG_CR_BUREGS0: crate::Register = crate::Register::new(0, 0xffffffff);
+        pub const SFR_BUREG_CR_BUREGS0_CR_BUREGS0: crate::Field = crate::Field::new(32, 0, SFR_BUREG_CR_BUREGS0);
+
+        pub const SFR_BUREG_CR_BUREGS1: crate::Register = crate::Register::new(1, 0xffffffff);
+        pub const SFR_BUREG_CR_BUREGS1_CR_BUREGS1: crate::Field = crate::Field::new(32, 0, SFR_BUREG_CR_BUREGS1);
+
+        pub const SFR_BUREG_CR_BUREGS2: crate::Register = crate::Register::new(2, 0xffffffff);
+        pub const SFR_BUREG_CR_BUREGS2_CR_BUREGS2: crate::Field = crate::Field::new(32, 0, SFR_BUREG_CR_BUREGS2);
+
+        pub const SFR_BUREG_CR_BUREGS3: crate::Register = crate::Register::new(3, 0xffffffff);
+        pub const SFR_BUREG_CR_BUREGS3_CR_BUREGS3: crate::Field = crate::Field::new(32, 0, SFR_BUREG_CR_BUREGS3);
+
+        pub const SFR_BUREG_CR_BUREGS4: crate::Register = crate::Register::new(4, 0xffffffff);
+        pub const SFR_BUREG_CR_BUREGS4_CR_BUREGS4: crate::Field = crate::Field::new(32, 0, SFR_BUREG_CR_BUREGS4);
+
+        pub const SFR_BUREG_CR_BUREGS5: crate::Register = crate::Register::new(5, 0xffffffff);
+        pub const SFR_BUREG_CR_BUREGS5_CR_BUREGS5: crate::Field = crate::Field::new(32, 0, SFR_BUREG_CR_BUREGS5);
+
+        pub const SFR_BUREG_CR_BUREGS6: crate::Register = crate::Register::new(6, 0xffffffff);
+        pub const SFR_BUREG_CR_BUREGS6_CR_BUREGS6: crate::Field = crate::Field::new(32, 0, SFR_BUREG_CR_BUREGS6);
+
+        pub const SFR_BUREG_CR_BUREGS7: crate::Register = crate::Register::new(7, 0xffffffff);
+        pub const SFR_BUREG_CR_BUREGS7_CR_BUREGS7: crate::Field = crate::Field::new(32, 0, SFR_BUREG_CR_BUREGS7);
+
+        pub const HW_AOBUREG_BASE: usize = 0x40065000;
+    }
+
+    pub mod ao_sysctrl {
+        pub const AO_SYSCTRL_NUMREGS: usize = 19;
+
+        pub const CR_CLK32KSEL: crate::Register = crate::Register::new(0, 0x1);
+        pub const CR_CLK32KSEL_CR_CLK32KSEL: crate::Field = crate::Field::new(1, 0, CR_CLK32KSEL);
+
+        pub const CR_CLK1HZFD: crate::Register = crate::Register::new(1, 0x3fff);
+        pub const CR_CLK1HZFD_CR_CLK1HZFD: crate::Field = crate::Field::new(14, 0, CR_CLK1HZFD);
+
+        pub const CR_WKUPMASK: crate::Register = crate::Register::new(2, 0x3ff);
+        pub const CR_WKUPMASK_CR_WKUPMASK: crate::Field = crate::Field::new(10, 0, CR_WKUPMASK);
+
+        pub const CR_RSTCRMASK: crate::Register = crate::Register::new(3, 0x1f);
+        pub const CR_RSTCRMASK_CR_RSTCRMASK: crate::Field = crate::Field::new(5, 0, CR_RSTCRMASK);
+
+        pub const SFR_PMUCR: crate::Register = crate::Register::new(4, 0xff);
+        pub const SFR_PMUCR_SFRPMUCR: crate::Field = crate::Field::new(8, 0, SFR_PMUCR);
+
+        pub const SFR_PMUCRLP: crate::Register = crate::Register::new(5, 0xff);
+        pub const SFR_PMUCRLP_SFRPMUCRLP: crate::Field = crate::Field::new(8, 0, SFR_PMUCRLP);
+
+        pub const SFR_PMUCRPD: crate::Register = crate::Register::new(6, 0xff);
+        pub const SFR_PMUCRPD_SFRPMUCRPD: crate::Field = crate::Field::new(8, 0, SFR_PMUCRPD);
+
+        pub const SFR_PMUDFT: crate::Register = crate::Register::new(7, 0x3f);
+        pub const SFR_PMUDFT_SFRPMUDFT: crate::Field = crate::Field::new(6, 0, SFR_PMUDFT);
+
+        pub const SFR_PMUTRM0: crate::Register = crate::Register::new(8, 0xffffffff);
+        pub const SFR_PMUTRM0_SFRPMUTRM: crate::Field = crate::Field::new(32, 0, SFR_PMUTRM0);
+
+        pub const SFR_PMUTRM1: crate::Register = crate::Register::new(9, 0x3);
+        pub const SFR_PMUTRM1_SFRPMUTRM: crate::Field = crate::Field::new(2, 0, SFR_PMUTRM1);
+
+        pub const SFR_PMUTRMLP0: crate::Register = crate::Register::new(10, 0xffffffff);
+        pub const SFR_PMUTRMLP0_SFRPMUTRMLP: crate::Field = crate::Field::new(32, 0, SFR_PMUTRMLP0);
+
+        pub const SFR_PMUTRMLP1: crate::Register = crate::Register::new(11, 0x3);
+        pub const SFR_PMUTRMLP1_SFRPMUTRMLP: crate::Field = crate::Field::new(2, 0, SFR_PMUTRMLP1);
+
+        pub const SFR_OSCCR: crate::Register = crate::Register::new(13, 0x1f);
+        pub const SFR_OSCCR_SFROSCCR: crate::Field = crate::Field::new(1, 0, SFR_OSCCR);
+        pub const SFR_OSCCR_SFROSCTRM: crate::Field = crate::Field::new(1, 1, SFR_OSCCR);
+        pub const SFR_OSCCR_SFROSCCRLP: crate::Field = crate::Field::new(1, 2, SFR_OSCCR);
+        pub const SFR_OSCCR_SFROSCTRMLP: crate::Field = crate::Field::new(1, 3, SFR_OSCCR);
+        pub const SFR_OSCCR_SFROSCCRPD: crate::Field = crate::Field::new(1, 4, SFR_OSCCR);
+
+        pub const SFR_PMUSR: crate::Register = crate::Register::new(14, 0x1f);
+        pub const SFR_PMUSR_SFR_PMUSR: crate::Field = crate::Field::new(5, 0, SFR_PMUSR);
+
+        pub const SFR_PMUFR: crate::Register = crate::Register::new(15, 0x1f);
+        pub const SFR_PMUFR_SFR_PMUFR: crate::Field = crate::Field::new(5, 0, SFR_PMUFR);
+
+        pub const SFR_AOFR: crate::Register = crate::Register::new(16, 0x3ff);
+        pub const SFR_AOFR_SFR_AOFR: crate::Field = crate::Field::new(10, 0, SFR_AOFR);
+
+        pub const SFR_PMUPDAR: crate::Register = crate::Register::new(17, 0xffffffff);
+        pub const SFR_PMUPDAR_SFR_PMUPDAR: crate::Field = crate::Field::new(32, 0, SFR_PMUPDAR);
+
+        pub const AR_AOPERI_CLRINT: crate::Register = crate::Register::new(20, 0xffffffff);
+        pub const AR_AOPERI_CLRINT_AR_AOPERI_CLRINT: crate::Field = crate::Field::new(32, 0, AR_AOPERI_CLRINT);
+
+        pub const SFR_IOX: crate::Register = crate::Register::new(24, 0x1);
+        pub const SFR_IOX_SFR_IOX: crate::Field = crate::Field::new(1, 0, SFR_IOX);
+
+        pub const HW_AO_SYSCTRL_BASE: usize = 0x40060000;
+    }
+
+    pub mod dkpc {
+        pub const DKPC_NUMREGS: usize = 7;
+
+        pub const SFR_CFG0: crate::Register = crate::Register::new(0, 0x3f);
+        pub const SFR_CFG0_KPOPO0: crate::Field = crate::Field::new(1, 0, SFR_CFG0);
+        pub const SFR_CFG0_KPOPO1: crate::Field = crate::Field::new(1, 1, SFR_CFG0);
+        pub const SFR_CFG0_KPOOE0: crate::Field = crate::Field::new(1, 2, SFR_CFG0);
+        pub const SFR_CFG0_KPOOE1: crate::Field = crate::Field::new(1, 3, SFR_CFG0);
+        pub const SFR_CFG0_DKPCEN: crate::Field = crate::Field::new(1, 4, SFR_CFG0);
+        pub const SFR_CFG0_AUTOSLEEPEN: crate::Field = crate::Field::new(1, 5, SFR_CFG0);
+
+        pub const SFR_CFG1: crate::Register = crate::Register::new(1, 0xffffff);
+        pub const SFR_CFG1_CFG_STEP: crate::Field = crate::Field::new(8, 0, SFR_CFG1);
+        pub const SFR_CFG1_CFG_FILTER: crate::Field = crate::Field::new(8, 8, SFR_CFG1);
+        pub const SFR_CFG1_CFG_CNT1MS: crate::Field = crate::Field::new(8, 16, SFR_CFG1);
+
+        pub const SFR_CFG2: crate::Register = crate::Register::new(2, 0xffffffff);
+        pub const SFR_CFG2_CFG_CNT: crate::Field = crate::Field::new(32, 0, SFR_CFG2);
+
+        pub const SFR_CFG3: crate::Register = crate::Register::new(3, 0x3);
+        pub const SFR_CFG3_KPNODERISEEN: crate::Field = crate::Field::new(1, 0, SFR_CFG3);
+        pub const SFR_CFG3_KPNODEFALLEN: crate::Field = crate::Field::new(1, 1, SFR_CFG3);
+
+        pub const SFR_SR0: crate::Register = crate::Register::new(4, 0x1f);
+        pub const SFR_SR0_KPNODEREG: crate::Field = crate::Field::new(1, 0, SFR_SR0);
+        pub const SFR_SR0_KPI0_PI: crate::Field = crate::Field::new(1, 1, SFR_SR0);
+        pub const SFR_SR0_KPI1_PI: crate::Field = crate::Field::new(1, 2, SFR_SR0);
+        pub const SFR_SR0_KPI2_PI: crate::Field = crate::Field::new(1, 3, SFR_SR0);
+        pub const SFR_SR0_KPI3_PI: crate::Field = crate::Field::new(1, 4, SFR_SR0);
+
+        pub const SFR_SR1: crate::Register = crate::Register::new(5, 0x1);
+        pub const SFR_SR1_SFR_SR1: crate::Field = crate::Field::new(1, 0, SFR_SR1);
+
+        pub const SFR_CFG4: crate::Register = crate::Register::new(12, 0xffff);
+        pub const SFR_CFG4_SFR_CFG4: crate::Field = crate::Field::new(16, 0, SFR_CFG4);
+
+        pub const HW_DKPC_BASE: usize = 0x40064000;
+    }
+
     pub mod udma_ctrl {
         pub const UDMA_CTRL_NUMREGS: usize = 3;
 
@@ -12140,13 +12770,13 @@ mod tests {
         baz |= sce_glbsfr_csr.ms(utra::sce_glbsfr::SFR_SUBEN_CR_SUBEN, 1);
         sce_glbsfr_csr.wfo(utra::sce_glbsfr::SFR_SUBEN_CR_SUBEN, baz);
 
-        let foo = sce_glbsfr_csr.r(utra::sce_glbsfr::SFR_AHBS);
-        sce_glbsfr_csr.wo(utra::sce_glbsfr::SFR_AHBS, foo);
-        let bar = sce_glbsfr_csr.rf(utra::sce_glbsfr::SFR_AHBS_CR_AHBSOPT);
-        sce_glbsfr_csr.rmwf(utra::sce_glbsfr::SFR_AHBS_CR_AHBSOPT, bar);
-        let mut baz = sce_glbsfr_csr.zf(utra::sce_glbsfr::SFR_AHBS_CR_AHBSOPT, bar);
-        baz |= sce_glbsfr_csr.ms(utra::sce_glbsfr::SFR_AHBS_CR_AHBSOPT, 1);
-        sce_glbsfr_csr.wfo(utra::sce_glbsfr::SFR_AHBS_CR_AHBSOPT, baz);
+        let foo = sce_glbsfr_csr.r(utra::sce_glbsfr::SFR_APBS);
+        sce_glbsfr_csr.wo(utra::sce_glbsfr::SFR_APBS, foo);
+        let bar = sce_glbsfr_csr.rf(utra::sce_glbsfr::SFR_APBS_CR_APBSOPT);
+        sce_glbsfr_csr.rmwf(utra::sce_glbsfr::SFR_APBS_CR_APBSOPT, bar);
+        let mut baz = sce_glbsfr_csr.zf(utra::sce_glbsfr::SFR_APBS_CR_APBSOPT, bar);
+        baz |= sce_glbsfr_csr.ms(utra::sce_glbsfr::SFR_APBS_CR_APBSOPT, 1);
+        sce_glbsfr_csr.wfo(utra::sce_glbsfr::SFR_APBS_CR_APBSOPT, baz);
 
         let foo = sce_glbsfr_csr.r(utra::sce_glbsfr::SFR_SRBUSY);
         sce_glbsfr_csr.wo(utra::sce_glbsfr::SFR_SRBUSY, foo);
@@ -14736,6 +15366,924 @@ mod tests {
         pwm_csr.wfo(utra::pwm::REG_PREFD3_LSCLK_PREFD_3, baz);
   }
 
+    #[test]
+    #[ignore]
+    fn compile_check_sddc_csr() {
+        use super::*;
+        let mut sddc_csr = CSR::new(HW_SDDC_BASE as *mut u32);
+
+        let foo = sddc_csr.r(utra::sddc::SFR_IO);
+        sddc_csr.wo(utra::sddc::SFR_IO, foo);
+        let bar = sddc_csr.rf(utra::sddc::SFR_IO_SFR_IO);
+        sddc_csr.rmwf(utra::sddc::SFR_IO_SFR_IO, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::SFR_IO_SFR_IO, bar);
+        baz |= sddc_csr.ms(utra::sddc::SFR_IO_SFR_IO, 1);
+        sddc_csr.wfo(utra::sddc::SFR_IO_SFR_IO, baz);
+
+        let foo = sddc_csr.r(utra::sddc::SFR_AR);
+        sddc_csr.wo(utra::sddc::SFR_AR, foo);
+        let bar = sddc_csr.rf(utra::sddc::SFR_AR_SFR_AR);
+        sddc_csr.rmwf(utra::sddc::SFR_AR_SFR_AR, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::SFR_AR_SFR_AR, bar);
+        baz |= sddc_csr.ms(utra::sddc::SFR_AR_SFR_AR, 1);
+        sddc_csr.wfo(utra::sddc::SFR_AR_SFR_AR, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_OCR);
+        sddc_csr.wo(utra::sddc::CR_OCR, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_OCR_CR_OCR);
+        sddc_csr.rmwf(utra::sddc::CR_OCR_CR_OCR, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_OCR_CR_OCR, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_OCR_CR_OCR, 1);
+        sddc_csr.wfo(utra::sddc::CR_OCR_CR_OCR, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_RDFFTHRES);
+        sddc_csr.wo(utra::sddc::CR_RDFFTHRES, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_RDFFTHRES_CR_RDFFTHRES);
+        sddc_csr.rmwf(utra::sddc::CR_RDFFTHRES_CR_RDFFTHRES, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_RDFFTHRES_CR_RDFFTHRES, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_RDFFTHRES_CR_RDFFTHRES, 1);
+        sddc_csr.wfo(utra::sddc::CR_RDFFTHRES_CR_RDFFTHRES, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REV);
+        sddc_csr.wo(utra::sddc::CR_REV, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REV_CFG_REG_SD_SPEC_REVISION);
+        sddc_csr.rmwf(utra::sddc::CR_REV_CFG_REG_SD_SPEC_REVISION, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REV_CFG_REG_SD_SPEC_REVISION, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REV_CFG_REG_SD_SPEC_REVISION, 1);
+        sddc_csr.wfo(utra::sddc::CR_REV_CFG_REG_SD_SPEC_REVISION, baz);
+        let bar = sddc_csr.rf(utra::sddc::CR_REV_CFG_REG_CCCR_SDIO_REVISION);
+        sddc_csr.rmwf(utra::sddc::CR_REV_CFG_REG_CCCR_SDIO_REVISION, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REV_CFG_REG_CCCR_SDIO_REVISION, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REV_CFG_REG_CCCR_SDIO_REVISION, 1);
+        sddc_csr.wfo(utra::sddc::CR_REV_CFG_REG_CCCR_SDIO_REVISION, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BACSA);
+        sddc_csr.wo(utra::sddc::CR_BACSA, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BACSA_CFG_BASE_ADDR_CSA);
+        sddc_csr.rmwf(utra::sddc::CR_BACSA_CFG_BASE_ADDR_CSA, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BACSA_CFG_BASE_ADDR_CSA, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BACSA_CFG_BASE_ADDR_CSA, 1);
+        sddc_csr.wfo(utra::sddc::CR_BACSA_CFG_BASE_ADDR_CSA, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC0);
+        sddc_csr.wo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC0, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC0_CFG_BASE_ADDR_IO_FUNC0);
+        sddc_csr.rmwf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC0_CFG_BASE_ADDR_IO_FUNC0, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC0_CFG_BASE_ADDR_IO_FUNC0, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC0_CFG_BASE_ADDR_IO_FUNC0, 1);
+        sddc_csr.wfo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC0_CFG_BASE_ADDR_IO_FUNC0, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC1);
+        sddc_csr.wo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC1, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC1_CFG_BASE_ADDR_IO_FUNC1);
+        sddc_csr.rmwf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC1_CFG_BASE_ADDR_IO_FUNC1, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC1_CFG_BASE_ADDR_IO_FUNC1, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC1_CFG_BASE_ADDR_IO_FUNC1, 1);
+        sddc_csr.wfo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC1_CFG_BASE_ADDR_IO_FUNC1, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC2);
+        sddc_csr.wo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC2, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC2_CFG_BASE_ADDR_IO_FUNC2);
+        sddc_csr.rmwf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC2_CFG_BASE_ADDR_IO_FUNC2, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC2_CFG_BASE_ADDR_IO_FUNC2, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC2_CFG_BASE_ADDR_IO_FUNC2, 1);
+        sddc_csr.wfo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC2_CFG_BASE_ADDR_IO_FUNC2, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC3);
+        sddc_csr.wo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC3, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC3_CFG_BASE_ADDR_IO_FUNC3);
+        sddc_csr.rmwf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC3_CFG_BASE_ADDR_IO_FUNC3, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC3_CFG_BASE_ADDR_IO_FUNC3, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC3_CFG_BASE_ADDR_IO_FUNC3, 1);
+        sddc_csr.wfo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC3_CFG_BASE_ADDR_IO_FUNC3, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC4);
+        sddc_csr.wo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC4, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC4_CFG_BASE_ADDR_IO_FUNC4);
+        sddc_csr.rmwf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC4_CFG_BASE_ADDR_IO_FUNC4, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC4_CFG_BASE_ADDR_IO_FUNC4, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC4_CFG_BASE_ADDR_IO_FUNC4, 1);
+        sddc_csr.wfo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC4_CFG_BASE_ADDR_IO_FUNC4, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC5);
+        sddc_csr.wo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC5, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC5_CFG_BASE_ADDR_IO_FUNC5);
+        sddc_csr.rmwf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC5_CFG_BASE_ADDR_IO_FUNC5, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC5_CFG_BASE_ADDR_IO_FUNC5, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC5_CFG_BASE_ADDR_IO_FUNC5, 1);
+        sddc_csr.wfo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC5_CFG_BASE_ADDR_IO_FUNC5, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC6);
+        sddc_csr.wo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC6, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC6_CFG_BASE_ADDR_IO_FUNC6);
+        sddc_csr.rmwf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC6_CFG_BASE_ADDR_IO_FUNC6, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC6_CFG_BASE_ADDR_IO_FUNC6, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC6_CFG_BASE_ADDR_IO_FUNC6, 1);
+        sddc_csr.wfo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC6_CFG_BASE_ADDR_IO_FUNC6, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC7);
+        sddc_csr.wo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC7, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC7_CFG_BASE_ADDR_IO_FUNC7);
+        sddc_csr.rmwf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC7_CFG_BASE_ADDR_IO_FUNC7, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC7_CFG_BASE_ADDR_IO_FUNC7, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC7_CFG_BASE_ADDR_IO_FUNC7, 1);
+        sddc_csr.wfo(utra::sddc::CR_BAIOFN_CFG_BASE_ADDR_IO_FUNC7_CFG_BASE_ADDR_IO_FUNC7, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR0);
+        sddc_csr.wo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR0, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR0_CFG_REG_FUNC_CIS_PTR0);
+        sddc_csr.rmwf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR0_CFG_REG_FUNC_CIS_PTR0, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR0_CFG_REG_FUNC_CIS_PTR0, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR0_CFG_REG_FUNC_CIS_PTR0, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR0_CFG_REG_FUNC_CIS_PTR0, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR1);
+        sddc_csr.wo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR1, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR1_CFG_REG_FUNC_CIS_PTR1);
+        sddc_csr.rmwf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR1_CFG_REG_FUNC_CIS_PTR1, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR1_CFG_REG_FUNC_CIS_PTR1, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR1_CFG_REG_FUNC_CIS_PTR1, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR1_CFG_REG_FUNC_CIS_PTR1, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR2);
+        sddc_csr.wo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR2, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR2_CFG_REG_FUNC_CIS_PTR2);
+        sddc_csr.rmwf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR2_CFG_REG_FUNC_CIS_PTR2, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR2_CFG_REG_FUNC_CIS_PTR2, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR2_CFG_REG_FUNC_CIS_PTR2, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR2_CFG_REG_FUNC_CIS_PTR2, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR3);
+        sddc_csr.wo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR3, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR3_CFG_REG_FUNC_CIS_PTR3);
+        sddc_csr.rmwf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR3_CFG_REG_FUNC_CIS_PTR3, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR3_CFG_REG_FUNC_CIS_PTR3, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR3_CFG_REG_FUNC_CIS_PTR3, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR3_CFG_REG_FUNC_CIS_PTR3, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR4);
+        sddc_csr.wo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR4, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR4_CFG_REG_FUNC_CIS_PTR4);
+        sddc_csr.rmwf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR4_CFG_REG_FUNC_CIS_PTR4, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR4_CFG_REG_FUNC_CIS_PTR4, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR4_CFG_REG_FUNC_CIS_PTR4, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR4_CFG_REG_FUNC_CIS_PTR4, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR5);
+        sddc_csr.wo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR5, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR5_CFG_REG_FUNC_CIS_PTR5);
+        sddc_csr.rmwf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR5_CFG_REG_FUNC_CIS_PTR5, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR5_CFG_REG_FUNC_CIS_PTR5, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR5_CFG_REG_FUNC_CIS_PTR5, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR5_CFG_REG_FUNC_CIS_PTR5, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR6);
+        sddc_csr.wo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR6, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR6_CFG_REG_FUNC_CIS_PTR6);
+        sddc_csr.rmwf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR6_CFG_REG_FUNC_CIS_PTR6, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR6_CFG_REG_FUNC_CIS_PTR6, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR6_CFG_REG_FUNC_CIS_PTR6, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR6_CFG_REG_FUNC_CIS_PTR6, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR7);
+        sddc_csr.wo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR7, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR7_CFG_REG_FUNC_CIS_PTR7);
+        sddc_csr.rmwf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR7_CFG_REG_FUNC_CIS_PTR7, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR7_CFG_REG_FUNC_CIS_PTR7, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR7_CFG_REG_FUNC_CIS_PTR7, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNCISPTR_CFG_REG_FUNC_CIS_PTR7_CFG_REG_FUNC_CIS_PTR7, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE0);
+        sddc_csr.wo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE0, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE0_CFG_REG_FUNC_EXT_STD_CODE0);
+        sddc_csr.rmwf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE0_CFG_REG_FUNC_EXT_STD_CODE0, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE0_CFG_REG_FUNC_EXT_STD_CODE0, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE0_CFG_REG_FUNC_EXT_STD_CODE0, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE0_CFG_REG_FUNC_EXT_STD_CODE0, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE1);
+        sddc_csr.wo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE1, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE1_CFG_REG_FUNC_EXT_STD_CODE1);
+        sddc_csr.rmwf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE1_CFG_REG_FUNC_EXT_STD_CODE1, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE1_CFG_REG_FUNC_EXT_STD_CODE1, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE1_CFG_REG_FUNC_EXT_STD_CODE1, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE1_CFG_REG_FUNC_EXT_STD_CODE1, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE2);
+        sddc_csr.wo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE2, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE2_CFG_REG_FUNC_EXT_STD_CODE2);
+        sddc_csr.rmwf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE2_CFG_REG_FUNC_EXT_STD_CODE2, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE2_CFG_REG_FUNC_EXT_STD_CODE2, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE2_CFG_REG_FUNC_EXT_STD_CODE2, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE2_CFG_REG_FUNC_EXT_STD_CODE2, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE3);
+        sddc_csr.wo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE3, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE3_CFG_REG_FUNC_EXT_STD_CODE3);
+        sddc_csr.rmwf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE3_CFG_REG_FUNC_EXT_STD_CODE3, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE3_CFG_REG_FUNC_EXT_STD_CODE3, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE3_CFG_REG_FUNC_EXT_STD_CODE3, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE3_CFG_REG_FUNC_EXT_STD_CODE3, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE4);
+        sddc_csr.wo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE4, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE4_CFG_REG_FUNC_EXT_STD_CODE4);
+        sddc_csr.rmwf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE4_CFG_REG_FUNC_EXT_STD_CODE4, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE4_CFG_REG_FUNC_EXT_STD_CODE4, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE4_CFG_REG_FUNC_EXT_STD_CODE4, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE4_CFG_REG_FUNC_EXT_STD_CODE4, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE5);
+        sddc_csr.wo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE5, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE5_CFG_REG_FUNC_EXT_STD_CODE5);
+        sddc_csr.rmwf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE5_CFG_REG_FUNC_EXT_STD_CODE5, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE5_CFG_REG_FUNC_EXT_STD_CODE5, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE5_CFG_REG_FUNC_EXT_STD_CODE5, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE5_CFG_REG_FUNC_EXT_STD_CODE5, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE6);
+        sddc_csr.wo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE6, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE6_CFG_REG_FUNC_EXT_STD_CODE6);
+        sddc_csr.rmwf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE6_CFG_REG_FUNC_EXT_STD_CODE6, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE6_CFG_REG_FUNC_EXT_STD_CODE6, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE6_CFG_REG_FUNC_EXT_STD_CODE6, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE6_CFG_REG_FUNC_EXT_STD_CODE6, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE7);
+        sddc_csr.wo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE7, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE7_CFG_REG_FUNC_EXT_STD_CODE7);
+        sddc_csr.rmwf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE7_CFG_REG_FUNC_EXT_STD_CODE7, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE7_CFG_REG_FUNC_EXT_STD_CODE7, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE7_CFG_REG_FUNC_EXT_STD_CODE7, 1);
+        sddc_csr.wfo(utra::sddc::CR_FNEXTSTDCODE_CFG_REG_FUNC_EXT_STD_CODE7_CFG_REG_FUNC_EXT_STD_CODE7, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_WRITE_PROTECT);
+        sddc_csr.wo(utra::sddc::CR_WRITE_PROTECT, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_WRITE_PROTECT_CR_WRITE_PROTECT);
+        sddc_csr.rmwf(utra::sddc::CR_WRITE_PROTECT_CR_WRITE_PROTECT, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_WRITE_PROTECT_CR_WRITE_PROTECT, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_WRITE_PROTECT_CR_WRITE_PROTECT, 1);
+        sddc_csr.wfo(utra::sddc::CR_WRITE_PROTECT_CR_WRITE_PROTECT, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_DSR);
+        sddc_csr.wo(utra::sddc::CR_REG_DSR, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_DSR_CR_REG_DSR);
+        sddc_csr.rmwf(utra::sddc::CR_REG_DSR_CR_REG_DSR, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_DSR_CR_REG_DSR, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_DSR_CR_REG_DSR, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_DSR_CR_REG_DSR, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_CID_CFG_REG_CID0);
+        sddc_csr.wo(utra::sddc::CR_REG_CID_CFG_REG_CID0, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_CID_CFG_REG_CID0_CFG_REG_CID0);
+        sddc_csr.rmwf(utra::sddc::CR_REG_CID_CFG_REG_CID0_CFG_REG_CID0, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_CID_CFG_REG_CID0_CFG_REG_CID0, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_CID_CFG_REG_CID0_CFG_REG_CID0, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_CID_CFG_REG_CID0_CFG_REG_CID0, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_CID_CFG_REG_CID1);
+        sddc_csr.wo(utra::sddc::CR_REG_CID_CFG_REG_CID1, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_CID_CFG_REG_CID1_CFG_REG_CID1);
+        sddc_csr.rmwf(utra::sddc::CR_REG_CID_CFG_REG_CID1_CFG_REG_CID1, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_CID_CFG_REG_CID1_CFG_REG_CID1, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_CID_CFG_REG_CID1_CFG_REG_CID1, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_CID_CFG_REG_CID1_CFG_REG_CID1, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_CID_CFG_REG_CID2);
+        sddc_csr.wo(utra::sddc::CR_REG_CID_CFG_REG_CID2, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_CID_CFG_REG_CID2_CFG_REG_CID2);
+        sddc_csr.rmwf(utra::sddc::CR_REG_CID_CFG_REG_CID2_CFG_REG_CID2, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_CID_CFG_REG_CID2_CFG_REG_CID2, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_CID_CFG_REG_CID2_CFG_REG_CID2, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_CID_CFG_REG_CID2_CFG_REG_CID2, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_CID_CFG_REG_CID3);
+        sddc_csr.wo(utra::sddc::CR_REG_CID_CFG_REG_CID3, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_CID_CFG_REG_CID3_CFG_REG_CID3);
+        sddc_csr.rmwf(utra::sddc::CR_REG_CID_CFG_REG_CID3_CFG_REG_CID3, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_CID_CFG_REG_CID3_CFG_REG_CID3, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_CID_CFG_REG_CID3_CFG_REG_CID3, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_CID_CFG_REG_CID3_CFG_REG_CID3, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_CSD_CFG_REG_CSD0);
+        sddc_csr.wo(utra::sddc::CR_REG_CSD_CFG_REG_CSD0, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_CSD_CFG_REG_CSD0_CFG_REG_CSD0);
+        sddc_csr.rmwf(utra::sddc::CR_REG_CSD_CFG_REG_CSD0_CFG_REG_CSD0, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_CSD_CFG_REG_CSD0_CFG_REG_CSD0, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_CSD_CFG_REG_CSD0_CFG_REG_CSD0, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_CSD_CFG_REG_CSD0_CFG_REG_CSD0, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_CSD_CFG_REG_CSD1);
+        sddc_csr.wo(utra::sddc::CR_REG_CSD_CFG_REG_CSD1, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_CSD_CFG_REG_CSD1_CFG_REG_CSD1);
+        sddc_csr.rmwf(utra::sddc::CR_REG_CSD_CFG_REG_CSD1_CFG_REG_CSD1, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_CSD_CFG_REG_CSD1_CFG_REG_CSD1, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_CSD_CFG_REG_CSD1_CFG_REG_CSD1, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_CSD_CFG_REG_CSD1_CFG_REG_CSD1, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_CSD_CFG_REG_CSD2);
+        sddc_csr.wo(utra::sddc::CR_REG_CSD_CFG_REG_CSD2, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_CSD_CFG_REG_CSD2_CFG_REG_CSD2);
+        sddc_csr.rmwf(utra::sddc::CR_REG_CSD_CFG_REG_CSD2_CFG_REG_CSD2, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_CSD_CFG_REG_CSD2_CFG_REG_CSD2, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_CSD_CFG_REG_CSD2_CFG_REG_CSD2, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_CSD_CFG_REG_CSD2_CFG_REG_CSD2, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_CSD_CFG_REG_CSD3);
+        sddc_csr.wo(utra::sddc::CR_REG_CSD_CFG_REG_CSD3, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_CSD_CFG_REG_CSD3_CFG_REG_CSD3);
+        sddc_csr.rmwf(utra::sddc::CR_REG_CSD_CFG_REG_CSD3_CFG_REG_CSD3, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_CSD_CFG_REG_CSD3_CFG_REG_CSD3, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_CSD_CFG_REG_CSD3_CFG_REG_CSD3, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_CSD_CFG_REG_CSD3_CFG_REG_CSD3, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SCR_CFG_REG_SCR0);
+        sddc_csr.wo(utra::sddc::CR_REG_SCR_CFG_REG_SCR0, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SCR_CFG_REG_SCR0_CFG_REG_SCR0);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SCR_CFG_REG_SCR0_CFG_REG_SCR0, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SCR_CFG_REG_SCR0_CFG_REG_SCR0, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SCR_CFG_REG_SCR0_CFG_REG_SCR0, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SCR_CFG_REG_SCR0_CFG_REG_SCR0, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SCR_CFG_REG_SCR1);
+        sddc_csr.wo(utra::sddc::CR_REG_SCR_CFG_REG_SCR1, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SCR_CFG_REG_SCR1_CFG_REG_SCR1);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SCR_CFG_REG_SCR1_CFG_REG_SCR1, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SCR_CFG_REG_SCR1_CFG_REG_SCR1, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SCR_CFG_REG_SCR1_CFG_REG_SCR1, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SCR_CFG_REG_SCR1_CFG_REG_SCR1, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS0);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS0, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS0_CFG_REG_SD_STATUS0);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS0_CFG_REG_SD_STATUS0, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS0_CFG_REG_SD_STATUS0, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS0_CFG_REG_SD_STATUS0, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS0_CFG_REG_SD_STATUS0, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS1);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS1, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS1_CFG_REG_SD_STATUS1);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS1_CFG_REG_SD_STATUS1, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS1_CFG_REG_SD_STATUS1, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS1_CFG_REG_SD_STATUS1, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS1_CFG_REG_SD_STATUS1, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS2);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS2, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS2_CFG_REG_SD_STATUS2);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS2_CFG_REG_SD_STATUS2, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS2_CFG_REG_SD_STATUS2, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS2_CFG_REG_SD_STATUS2, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS2_CFG_REG_SD_STATUS2, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS3);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS3, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS3_CFG_REG_SD_STATUS3);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS3_CFG_REG_SD_STATUS3, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS3_CFG_REG_SD_STATUS3, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS3_CFG_REG_SD_STATUS3, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS3_CFG_REG_SD_STATUS3, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS4);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS4, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS4_CFG_REG_SD_STATUS4);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS4_CFG_REG_SD_STATUS4, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS4_CFG_REG_SD_STATUS4, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS4_CFG_REG_SD_STATUS4, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS4_CFG_REG_SD_STATUS4, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS5);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS5, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS5_CFG_REG_SD_STATUS5);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS5_CFG_REG_SD_STATUS5, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS5_CFG_REG_SD_STATUS5, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS5_CFG_REG_SD_STATUS5, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS5_CFG_REG_SD_STATUS5, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS6);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS6, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS6_CFG_REG_SD_STATUS6);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS6_CFG_REG_SD_STATUS6, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS6_CFG_REG_SD_STATUS6, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS6_CFG_REG_SD_STATUS6, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS6_CFG_REG_SD_STATUS6, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS7);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS7, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS7_CFG_REG_SD_STATUS7);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS7_CFG_REG_SD_STATUS7, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS7_CFG_REG_SD_STATUS7, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS7_CFG_REG_SD_STATUS7, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS7_CFG_REG_SD_STATUS7, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS8);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS8, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS8_CFG_REG_SD_STATUS8);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS8_CFG_REG_SD_STATUS8, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS8_CFG_REG_SD_STATUS8, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS8_CFG_REG_SD_STATUS8, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS8_CFG_REG_SD_STATUS8, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS9);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS9, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS9_CFG_REG_SD_STATUS9);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS9_CFG_REG_SD_STATUS9, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS9_CFG_REG_SD_STATUS9, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS9_CFG_REG_SD_STATUS9, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS9_CFG_REG_SD_STATUS9, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS10);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS10, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS10_CFG_REG_SD_STATUS10);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS10_CFG_REG_SD_STATUS10, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS10_CFG_REG_SD_STATUS10, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS10_CFG_REG_SD_STATUS10, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS10_CFG_REG_SD_STATUS10, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS11);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS11, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS11_CFG_REG_SD_STATUS11);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS11_CFG_REG_SD_STATUS11, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS11_CFG_REG_SD_STATUS11, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS11_CFG_REG_SD_STATUS11, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS11_CFG_REG_SD_STATUS11, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS12);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS12, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS12_CFG_REG_SD_STATUS12);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS12_CFG_REG_SD_STATUS12, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS12_CFG_REG_SD_STATUS12, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS12_CFG_REG_SD_STATUS12, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS12_CFG_REG_SD_STATUS12, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS13);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS13, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS13_CFG_REG_SD_STATUS13);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS13_CFG_REG_SD_STATUS13, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS13_CFG_REG_SD_STATUS13, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS13_CFG_REG_SD_STATUS13, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS13_CFG_REG_SD_STATUS13, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS14);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS14, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS14_CFG_REG_SD_STATUS14);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS14_CFG_REG_SD_STATUS14, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS14_CFG_REG_SD_STATUS14, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS14_CFG_REG_SD_STATUS14, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS14_CFG_REG_SD_STATUS14, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS15);
+        sddc_csr.wo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS15, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS15_CFG_REG_SD_STATUS15);
+        sddc_csr.rmwf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS15_CFG_REG_SD_STATUS15, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS15_CFG_REG_SD_STATUS15, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS15_CFG_REG_SD_STATUS15, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_SD_STATUS_CFG_REG_SD_STATUS15_CFG_REG_SD_STATUS15, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC0);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC0, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC0_CFG_BASE_ADDR_MEM_FUNC0);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC0_CFG_BASE_ADDR_MEM_FUNC0, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC0_CFG_BASE_ADDR_MEM_FUNC0, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC0_CFG_BASE_ADDR_MEM_FUNC0, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC0_CFG_BASE_ADDR_MEM_FUNC0, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC1);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC1, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC1_CFG_BASE_ADDR_MEM_FUNC1);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC1_CFG_BASE_ADDR_MEM_FUNC1, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC1_CFG_BASE_ADDR_MEM_FUNC1, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC1_CFG_BASE_ADDR_MEM_FUNC1, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC1_CFG_BASE_ADDR_MEM_FUNC1, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC2);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC2, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC2_CFG_BASE_ADDR_MEM_FUNC2);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC2_CFG_BASE_ADDR_MEM_FUNC2, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC2_CFG_BASE_ADDR_MEM_FUNC2, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC2_CFG_BASE_ADDR_MEM_FUNC2, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC2_CFG_BASE_ADDR_MEM_FUNC2, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC3);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC3, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC3_CFG_BASE_ADDR_MEM_FUNC3);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC3_CFG_BASE_ADDR_MEM_FUNC3, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC3_CFG_BASE_ADDR_MEM_FUNC3, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC3_CFG_BASE_ADDR_MEM_FUNC3, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC3_CFG_BASE_ADDR_MEM_FUNC3, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC4);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC4, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC4_CFG_BASE_ADDR_MEM_FUNC4);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC4_CFG_BASE_ADDR_MEM_FUNC4, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC4_CFG_BASE_ADDR_MEM_FUNC4, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC4_CFG_BASE_ADDR_MEM_FUNC4, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC4_CFG_BASE_ADDR_MEM_FUNC4, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC5);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC5, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC5_CFG_BASE_ADDR_MEM_FUNC5);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC5_CFG_BASE_ADDR_MEM_FUNC5, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC5_CFG_BASE_ADDR_MEM_FUNC5, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC5_CFG_BASE_ADDR_MEM_FUNC5, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC5_CFG_BASE_ADDR_MEM_FUNC5, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC6);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC6, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC6_CFG_BASE_ADDR_MEM_FUNC6);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC6_CFG_BASE_ADDR_MEM_FUNC6, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC6_CFG_BASE_ADDR_MEM_FUNC6, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC6_CFG_BASE_ADDR_MEM_FUNC6, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC6_CFG_BASE_ADDR_MEM_FUNC6, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC7);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC7, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC7_CFG_BASE_ADDR_MEM_FUNC7);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC7_CFG_BASE_ADDR_MEM_FUNC7, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC7_CFG_BASE_ADDR_MEM_FUNC7, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC7_CFG_BASE_ADDR_MEM_FUNC7, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC7_CFG_BASE_ADDR_MEM_FUNC7, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC8);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC8, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC8_CFG_BASE_ADDR_MEM_FUNC8);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC8_CFG_BASE_ADDR_MEM_FUNC8, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC8_CFG_BASE_ADDR_MEM_FUNC8, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC8_CFG_BASE_ADDR_MEM_FUNC8, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC8_CFG_BASE_ADDR_MEM_FUNC8, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC9);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC9, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC9_CFG_BASE_ADDR_MEM_FUNC9);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC9_CFG_BASE_ADDR_MEM_FUNC9, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC9_CFG_BASE_ADDR_MEM_FUNC9, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC9_CFG_BASE_ADDR_MEM_FUNC9, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC9_CFG_BASE_ADDR_MEM_FUNC9, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC10);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC10, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC10_CFG_BASE_ADDR_MEM_FUNC10);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC10_CFG_BASE_ADDR_MEM_FUNC10, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC10_CFG_BASE_ADDR_MEM_FUNC10, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC10_CFG_BASE_ADDR_MEM_FUNC10, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC10_CFG_BASE_ADDR_MEM_FUNC10, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC11);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC11, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC11_CFG_BASE_ADDR_MEM_FUNC11);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC11_CFG_BASE_ADDR_MEM_FUNC11, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC11_CFG_BASE_ADDR_MEM_FUNC11, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC11_CFG_BASE_ADDR_MEM_FUNC11, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC11_CFG_BASE_ADDR_MEM_FUNC11, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC12);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC12, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC12_CFG_BASE_ADDR_MEM_FUNC12);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC12_CFG_BASE_ADDR_MEM_FUNC12, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC12_CFG_BASE_ADDR_MEM_FUNC12, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC12_CFG_BASE_ADDR_MEM_FUNC12, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC12_CFG_BASE_ADDR_MEM_FUNC12, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC13);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC13, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC13_CFG_BASE_ADDR_MEM_FUNC13);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC13_CFG_BASE_ADDR_MEM_FUNC13, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC13_CFG_BASE_ADDR_MEM_FUNC13, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC13_CFG_BASE_ADDR_MEM_FUNC13, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC13_CFG_BASE_ADDR_MEM_FUNC13, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC14);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC14, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC14_CFG_BASE_ADDR_MEM_FUNC14);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC14_CFG_BASE_ADDR_MEM_FUNC14, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC14_CFG_BASE_ADDR_MEM_FUNC14, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC14_CFG_BASE_ADDR_MEM_FUNC14, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC14_CFG_BASE_ADDR_MEM_FUNC14, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC15);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC15, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC15_CFG_BASE_ADDR_MEM_FUNC15);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC15_CFG_BASE_ADDR_MEM_FUNC15, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC15_CFG_BASE_ADDR_MEM_FUNC15, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC15_CFG_BASE_ADDR_MEM_FUNC15, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC15_CFG_BASE_ADDR_MEM_FUNC15, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC16);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC16, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC16_CFG_BASE_ADDR_MEM_FUNC16);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC16_CFG_BASE_ADDR_MEM_FUNC16, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC16_CFG_BASE_ADDR_MEM_FUNC16, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC16_CFG_BASE_ADDR_MEM_FUNC16, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC16_CFG_BASE_ADDR_MEM_FUNC16, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC17);
+        sddc_csr.wo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC17, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC17_CFG_BASE_ADDR_MEM_FUNC17);
+        sddc_csr.rmwf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC17_CFG_BASE_ADDR_MEM_FUNC17, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC17_CFG_BASE_ADDR_MEM_FUNC17, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC17_CFG_BASE_ADDR_MEM_FUNC17, 1);
+        sddc_csr.wfo(utra::sddc::CR_BASE_ADDR_MEM_FUNC_CFG_BASE_ADDR_MEM_FUNC17_CFG_BASE_ADDR_MEM_FUNC17, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0_CFG_REG_FUNC_ISDIO_INTERFACE_CODE0, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1_CFG_REG_FUNC_ISDIO_INTERFACE_CODE1, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2_CFG_REG_FUNC_ISDIO_INTERFACE_CODE2, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3_CFG_REG_FUNC_ISDIO_INTERFACE_CODE3, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4_CFG_REG_FUNC_ISDIO_INTERFACE_CODE4, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5_CFG_REG_FUNC_ISDIO_INTERFACE_CODE5, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_ISDIO_INTERFACE_CODE_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6_CFG_REG_FUNC_ISDIO_INTERFACE_CODE6, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE0);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE0, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE0_CFG_REG_FUNC_MANUFACT_CODE0);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE0_CFG_REG_FUNC_MANUFACT_CODE0, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE0_CFG_REG_FUNC_MANUFACT_CODE0, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE0_CFG_REG_FUNC_MANUFACT_CODE0, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE0_CFG_REG_FUNC_MANUFACT_CODE0, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE1);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE1, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE1_CFG_REG_FUNC_MANUFACT_CODE1);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE1_CFG_REG_FUNC_MANUFACT_CODE1, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE1_CFG_REG_FUNC_MANUFACT_CODE1, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE1_CFG_REG_FUNC_MANUFACT_CODE1, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE1_CFG_REG_FUNC_MANUFACT_CODE1, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE2);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE2, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE2_CFG_REG_FUNC_MANUFACT_CODE2);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE2_CFG_REG_FUNC_MANUFACT_CODE2, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE2_CFG_REG_FUNC_MANUFACT_CODE2, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE2_CFG_REG_FUNC_MANUFACT_CODE2, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE2_CFG_REG_FUNC_MANUFACT_CODE2, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE3);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE3, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE3_CFG_REG_FUNC_MANUFACT_CODE3);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE3_CFG_REG_FUNC_MANUFACT_CODE3, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE3_CFG_REG_FUNC_MANUFACT_CODE3, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE3_CFG_REG_FUNC_MANUFACT_CODE3, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE3_CFG_REG_FUNC_MANUFACT_CODE3, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE4);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE4, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE4_CFG_REG_FUNC_MANUFACT_CODE4);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE4_CFG_REG_FUNC_MANUFACT_CODE4, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE4_CFG_REG_FUNC_MANUFACT_CODE4, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE4_CFG_REG_FUNC_MANUFACT_CODE4, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE4_CFG_REG_FUNC_MANUFACT_CODE4, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE5);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE5, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE5_CFG_REG_FUNC_MANUFACT_CODE5);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE5_CFG_REG_FUNC_MANUFACT_CODE5, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE5_CFG_REG_FUNC_MANUFACT_CODE5, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE5_CFG_REG_FUNC_MANUFACT_CODE5, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE5_CFG_REG_FUNC_MANUFACT_CODE5, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE6);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE6, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE6_CFG_REG_FUNC_MANUFACT_CODE6);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE6_CFG_REG_FUNC_MANUFACT_CODE6, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE6_CFG_REG_FUNC_MANUFACT_CODE6, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE6_CFG_REG_FUNC_MANUFACT_CODE6, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_MANUFACT_CODE_CFG_REG_FUNC_MANUFACT_CODE6_CFG_REG_FUNC_MANUFACT_CODE6, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO0);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO0, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO0_CFG_REG_FUNC_MANUFACT_INFO0);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO0_CFG_REG_FUNC_MANUFACT_INFO0, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO0_CFG_REG_FUNC_MANUFACT_INFO0, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO0_CFG_REG_FUNC_MANUFACT_INFO0, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO0_CFG_REG_FUNC_MANUFACT_INFO0, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO1);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO1, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO1_CFG_REG_FUNC_MANUFACT_INFO1);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO1_CFG_REG_FUNC_MANUFACT_INFO1, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO1_CFG_REG_FUNC_MANUFACT_INFO1, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO1_CFG_REG_FUNC_MANUFACT_INFO1, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO1_CFG_REG_FUNC_MANUFACT_INFO1, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO2);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO2, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO2_CFG_REG_FUNC_MANUFACT_INFO2);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO2_CFG_REG_FUNC_MANUFACT_INFO2, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO2_CFG_REG_FUNC_MANUFACT_INFO2, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO2_CFG_REG_FUNC_MANUFACT_INFO2, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO2_CFG_REG_FUNC_MANUFACT_INFO2, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO3);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO3, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO3_CFG_REG_FUNC_MANUFACT_INFO3);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO3_CFG_REG_FUNC_MANUFACT_INFO3, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO3_CFG_REG_FUNC_MANUFACT_INFO3, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO3_CFG_REG_FUNC_MANUFACT_INFO3, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO3_CFG_REG_FUNC_MANUFACT_INFO3, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO4);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO4, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO4_CFG_REG_FUNC_MANUFACT_INFO4);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO4_CFG_REG_FUNC_MANUFACT_INFO4, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO4_CFG_REG_FUNC_MANUFACT_INFO4, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO4_CFG_REG_FUNC_MANUFACT_INFO4, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO4_CFG_REG_FUNC_MANUFACT_INFO4, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO5);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO5, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO5_CFG_REG_FUNC_MANUFACT_INFO5);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO5_CFG_REG_FUNC_MANUFACT_INFO5, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO5_CFG_REG_FUNC_MANUFACT_INFO5, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO5_CFG_REG_FUNC_MANUFACT_INFO5, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO5_CFG_REG_FUNC_MANUFACT_INFO5, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO6);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO6, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO6_CFG_REG_FUNC_MANUFACT_INFO6);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO6_CFG_REG_FUNC_MANUFACT_INFO6, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO6_CFG_REG_FUNC_MANUFACT_INFO6, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO6_CFG_REG_FUNC_MANUFACT_INFO6, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_MANUFACT_INFO_CFG_REG_FUNC_MANUFACT_INFO6_CFG_REG_FUNC_MANUFACT_INFO6, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE0, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE1, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE2, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE3, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE4, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE5, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_ISDIO_TYPE_SUP_CODE_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6_CFG_REG_FUNC_ISDIO_TYPE_SUP_CODE6, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO0);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO0, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO0_CFG_REG_FUNC_INFO0);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO0_CFG_REG_FUNC_INFO0, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO0_CFG_REG_FUNC_INFO0, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO0_CFG_REG_FUNC_INFO0, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO0_CFG_REG_FUNC_INFO0, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO1);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO1, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO1_CFG_REG_FUNC_INFO1);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO1_CFG_REG_FUNC_INFO1, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO1_CFG_REG_FUNC_INFO1, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO1_CFG_REG_FUNC_INFO1, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO1_CFG_REG_FUNC_INFO1, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO2);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO2, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO2_CFG_REG_FUNC_INFO2);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO2_CFG_REG_FUNC_INFO2, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO2_CFG_REG_FUNC_INFO2, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO2_CFG_REG_FUNC_INFO2, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO2_CFG_REG_FUNC_INFO2, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO3);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO3, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO3_CFG_REG_FUNC_INFO3);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO3_CFG_REG_FUNC_INFO3, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO3_CFG_REG_FUNC_INFO3, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO3_CFG_REG_FUNC_INFO3, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO3_CFG_REG_FUNC_INFO3, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO4);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO4, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO4_CFG_REG_FUNC_INFO4);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO4_CFG_REG_FUNC_INFO4, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO4_CFG_REG_FUNC_INFO4, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO4_CFG_REG_FUNC_INFO4, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO4_CFG_REG_FUNC_INFO4, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO5);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO5, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO5_CFG_REG_FUNC_INFO5);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO5_CFG_REG_FUNC_INFO5, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO5_CFG_REG_FUNC_INFO5, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO5_CFG_REG_FUNC_INFO5, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO5_CFG_REG_FUNC_INFO5, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO6);
+        sddc_csr.wo(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO6, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO6_CFG_REG_FUNC_INFO6);
+        sddc_csr.rmwf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO6_CFG_REG_FUNC_INFO6, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO6_CFG_REG_FUNC_INFO6, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO6_CFG_REG_FUNC_INFO6, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_FUNC_INFO_CFG_REG_FUNC_INFO6_CFG_REG_FUNC_INFO6, baz);
+
+        let foo = sddc_csr.r(utra::sddc::CR_REG_UHS_1_SUPPORT);
+        sddc_csr.wo(utra::sddc::CR_REG_UHS_1_SUPPORT, foo);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_UHS_1_SUPPORT_CFG_REG_MAX_CURRENT);
+        sddc_csr.rmwf(utra::sddc::CR_REG_UHS_1_SUPPORT_CFG_REG_MAX_CURRENT, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_UHS_1_SUPPORT_CFG_REG_MAX_CURRENT, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_UHS_1_SUPPORT_CFG_REG_MAX_CURRENT, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_UHS_1_SUPPORT_CFG_REG_MAX_CURRENT, baz);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_UHS_1_SUPPORT_CFG_REG_DATA_STRC_VERSION);
+        sddc_csr.rmwf(utra::sddc::CR_REG_UHS_1_SUPPORT_CFG_REG_DATA_STRC_VERSION, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_UHS_1_SUPPORT_CFG_REG_DATA_STRC_VERSION, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_UHS_1_SUPPORT_CFG_REG_DATA_STRC_VERSION, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_UHS_1_SUPPORT_CFG_REG_DATA_STRC_VERSION, baz);
+        let bar = sddc_csr.rf(utra::sddc::CR_REG_UHS_1_SUPPORT_CFG_REG_UHS_1_SUPPORT);
+        sddc_csr.rmwf(utra::sddc::CR_REG_UHS_1_SUPPORT_CFG_REG_UHS_1_SUPPORT, bar);
+        let mut baz = sddc_csr.zf(utra::sddc::CR_REG_UHS_1_SUPPORT_CFG_REG_UHS_1_SUPPORT, bar);
+        baz |= sddc_csr.ms(utra::sddc::CR_REG_UHS_1_SUPPORT_CFG_REG_UHS_1_SUPPORT, 1);
+        sddc_csr.wfo(utra::sddc::CR_REG_UHS_1_SUPPORT_CFG_REG_UHS_1_SUPPORT, baz);
+  }
+
     #[test]
     #[ignore]
     fn compile_check_coresub_sramtrm_csr() {
@@ -15189,6 +16737,101 @@ mod tests {
         mbox_apb_csr.wfo(utra::mbox_apb::SFR_DONE_SFR_DONE, baz);
   }
 
+    #[test]
+    #[ignore]
+    fn compile_check_rrc_csr() {
+        use super::*;
+        let mut rrc_csr = CSR::new(HW_RRC_BASE as *mut u32);
+
+        let foo = rrc_csr.r(utra::rrc::SFR_RRCCR);
+        rrc_csr.wo(utra::rrc::SFR_RRCCR, foo);
+        let bar = rrc_csr.rf(utra::rrc::SFR_RRCCR_SFR_RRCCR);
+        rrc_csr.rmwf(utra::rrc::SFR_RRCCR_SFR_RRCCR, bar);
+        let mut baz = rrc_csr.zf(utra::rrc::SFR_RRCCR_SFR_RRCCR, bar);
+        baz |= rrc_csr.ms(utra::rrc::SFR_RRCCR_SFR_RRCCR, 1);
+        rrc_csr.wfo(utra::rrc::SFR_RRCCR_SFR_RRCCR, baz);
+
+        let foo = rrc_csr.r(utra::rrc::SFR_RRCFD);
+        rrc_csr.wo(utra::rrc::SFR_RRCFD, foo);
+        let bar = rrc_csr.rf(utra::rrc::SFR_RRCFD_SFR_RRCFD);
+        rrc_csr.rmwf(utra::rrc::SFR_RRCFD_SFR_RRCFD, bar);
+        let mut baz = rrc_csr.zf(utra::rrc::SFR_RRCFD_SFR_RRCFD, bar);
+        baz |= rrc_csr.ms(utra::rrc::SFR_RRCFD_SFR_RRCFD, 1);
+        rrc_csr.wfo(utra::rrc::SFR_RRCFD_SFR_RRCFD, baz);
+
+        let foo = rrc_csr.r(utra::rrc::SFR_RRCSR);
+        rrc_csr.wo(utra::rrc::SFR_RRCSR, foo);
+        let bar = rrc_csr.rf(utra::rrc::SFR_RRCSR_SFR_RRCSR);
+        rrc_csr.rmwf(utra::rrc::SFR_RRCSR_SFR_RRCSR, bar);
+        let mut baz = rrc_csr.zf(utra::rrc::SFR_RRCSR_SFR_RRCSR, bar);
+        baz |= rrc_csr.ms(utra::rrc::SFR_RRCSR_SFR_RRCSR, 1);
+        rrc_csr.wfo(utra::rrc::SFR_RRCSR_SFR_RRCSR, baz);
+
+        let foo = rrc_csr.r(utra::rrc::SFR_RRCFR);
+        rrc_csr.wo(utra::rrc::SFR_RRCFR, foo);
+        let bar = rrc_csr.rf(utra::rrc::SFR_RRCFR_SFR_RRCFR);
+        rrc_csr.rmwf(utra::rrc::SFR_RRCFR_SFR_RRCFR, bar);
+        let mut baz = rrc_csr.zf(utra::rrc::SFR_RRCFR_SFR_RRCFR, bar);
+        baz |= rrc_csr.ms(utra::rrc::SFR_RRCFR_SFR_RRCFR, 1);
+        rrc_csr.wfo(utra::rrc::SFR_RRCFR_SFR_RRCFR, baz);
+
+        let foo = rrc_csr.r(utra::rrc::SFR_RRCAR);
+        rrc_csr.wo(utra::rrc::SFR_RRCAR, foo);
+        let bar = rrc_csr.rf(utra::rrc::SFR_RRCAR_SFR_RRCAR);
+        rrc_csr.rmwf(utra::rrc::SFR_RRCAR_SFR_RRCAR, bar);
+        let mut baz = rrc_csr.zf(utra::rrc::SFR_RRCAR_SFR_RRCAR, bar);
+        baz |= rrc_csr.ms(utra::rrc::SFR_RRCAR_SFR_RRCAR, 1);
+        rrc_csr.wfo(utra::rrc::SFR_RRCAR_SFR_RRCAR, baz);
+
+        let foo = rrc_csr.r(utra::rrc::SFR_RRCSR_SET0);
+        rrc_csr.wo(utra::rrc::SFR_RRCSR_SET0, foo);
+        let bar = rrc_csr.rf(utra::rrc::SFR_RRCSR_SET0_TRC_SET_FAILURE);
+        rrc_csr.rmwf(utra::rrc::SFR_RRCSR_SET0_TRC_SET_FAILURE, bar);
+        let mut baz = rrc_csr.zf(utra::rrc::SFR_RRCSR_SET0_TRC_SET_FAILURE, bar);
+        baz |= rrc_csr.ms(utra::rrc::SFR_RRCSR_SET0_TRC_SET_FAILURE, 1);
+        rrc_csr.wfo(utra::rrc::SFR_RRCSR_SET0_TRC_SET_FAILURE, baz);
+
+        let foo = rrc_csr.r(utra::rrc::SFR_RRCSR_SET1);
+        rrc_csr.wo(utra::rrc::SFR_RRCSR_SET1, foo);
+        let bar = rrc_csr.rf(utra::rrc::SFR_RRCSR_SET1_TRC_SET_FAILURE);
+        rrc_csr.rmwf(utra::rrc::SFR_RRCSR_SET1_TRC_SET_FAILURE, bar);
+        let mut baz = rrc_csr.zf(utra::rrc::SFR_RRCSR_SET1_TRC_SET_FAILURE, bar);
+        baz |= rrc_csr.ms(utra::rrc::SFR_RRCSR_SET1_TRC_SET_FAILURE, 1);
+        rrc_csr.wfo(utra::rrc::SFR_RRCSR_SET1_TRC_SET_FAILURE, baz);
+
+        let foo = rrc_csr.r(utra::rrc::SFR_RRCSR_RST0);
+        rrc_csr.wo(utra::rrc::SFR_RRCSR_RST0, foo);
+        let bar = rrc_csr.rf(utra::rrc::SFR_RRCSR_RST0_TRC_RESET_FAILURE);
+        rrc_csr.rmwf(utra::rrc::SFR_RRCSR_RST0_TRC_RESET_FAILURE, bar);
+        let mut baz = rrc_csr.zf(utra::rrc::SFR_RRCSR_RST0_TRC_RESET_FAILURE, bar);
+        baz |= rrc_csr.ms(utra::rrc::SFR_RRCSR_RST0_TRC_RESET_FAILURE, 1);
+        rrc_csr.wfo(utra::rrc::SFR_RRCSR_RST0_TRC_RESET_FAILURE, baz);
+
+        let foo = rrc_csr.r(utra::rrc::SFR_RRCSR_RST1);
+        rrc_csr.wo(utra::rrc::SFR_RRCSR_RST1, foo);
+        let bar = rrc_csr.rf(utra::rrc::SFR_RRCSR_RST1_TRC_RESET_FAILURE);
+        rrc_csr.rmwf(utra::rrc::SFR_RRCSR_RST1_TRC_RESET_FAILURE, bar);
+        let mut baz = rrc_csr.zf(utra::rrc::SFR_RRCSR_RST1_TRC_RESET_FAILURE, bar);
+        baz |= rrc_csr.ms(utra::rrc::SFR_RRCSR_RST1_TRC_RESET_FAILURE, 1);
+        rrc_csr.wfo(utra::rrc::SFR_RRCSR_RST1_TRC_RESET_FAILURE, baz);
+
+        let foo = rrc_csr.r(utra::rrc::SFR_RRCSR_RD0);
+        rrc_csr.wo(utra::rrc::SFR_RRCSR_RD0, foo);
+        let bar = rrc_csr.rf(utra::rrc::SFR_RRCSR_RD0_TRC_FOURTH_READ_FAILURE);
+        rrc_csr.rmwf(utra::rrc::SFR_RRCSR_RD0_TRC_FOURTH_READ_FAILURE, bar);
+        let mut baz = rrc_csr.zf(utra::rrc::SFR_RRCSR_RD0_TRC_FOURTH_READ_FAILURE, bar);
+        baz |= rrc_csr.ms(utra::rrc::SFR_RRCSR_RD0_TRC_FOURTH_READ_FAILURE, 1);
+        rrc_csr.wfo(utra::rrc::SFR_RRCSR_RD0_TRC_FOURTH_READ_FAILURE, baz);
+
+        let foo = rrc_csr.r(utra::rrc::SFR_RRCSR_RD1);
+        rrc_csr.wo(utra::rrc::SFR_RRCSR_RD1, foo);
+        let bar = rrc_csr.rf(utra::rrc::SFR_RRCSR_RD1_TRC_FOURTH_READ_FAILURE);
+        rrc_csr.rmwf(utra::rrc::SFR_RRCSR_RD1_TRC_FOURTH_READ_FAILURE, bar);
+        let mut baz = rrc_csr.zf(utra::rrc::SFR_RRCSR_RD1_TRC_FOURTH_READ_FAILURE, bar);
+        baz |= rrc_csr.ms(utra::rrc::SFR_RRCSR_RD1_TRC_FOURTH_READ_FAILURE, 1);
+        rrc_csr.wfo(utra::rrc::SFR_RRCSR_RD1_TRC_FOURTH_READ_FAILURE, baz);
+  }
+
     #[test]
     #[ignore]
     fn compile_check_gluechain_csr() {
@@ -15228,6 +16871,625 @@ mod tests {
         gluechain_csr.wfo(utra::gluechain::SFR_GCTEST_GLUETEST, baz);
   }
 
+    #[test]
+    #[ignore]
+    fn compile_check_mesh_csr() {
+        use super::*;
+        let mut mesh_csr = CSR::new(HW_MESH_BASE as *mut u32);
+
+        let foo = mesh_csr.r(utra::mesh::SFR_MLDRV_CR_MLDRV0);
+        mesh_csr.wo(utra::mesh::SFR_MLDRV_CR_MLDRV0, foo);
+        let bar = mesh_csr.rf(utra::mesh::SFR_MLDRV_CR_MLDRV0_CR_MLDRV0);
+        mesh_csr.rmwf(utra::mesh::SFR_MLDRV_CR_MLDRV0_CR_MLDRV0, bar);
+        let mut baz = mesh_csr.zf(utra::mesh::SFR_MLDRV_CR_MLDRV0_CR_MLDRV0, bar);
+        baz |= mesh_csr.ms(utra::mesh::SFR_MLDRV_CR_MLDRV0_CR_MLDRV0, 1);
+        mesh_csr.wfo(utra::mesh::SFR_MLDRV_CR_MLDRV0_CR_MLDRV0, baz);
+
+        let foo = mesh_csr.r(utra::mesh::SFR_MLIE_CR_MLIE0);
+        mesh_csr.wo(utra::mesh::SFR_MLIE_CR_MLIE0, foo);
+        let bar = mesh_csr.rf(utra::mesh::SFR_MLIE_CR_MLIE0_CR_MLIE0);
+        mesh_csr.rmwf(utra::mesh::SFR_MLIE_CR_MLIE0_CR_MLIE0, bar);
+        let mut baz = mesh_csr.zf(utra::mesh::SFR_MLIE_CR_MLIE0_CR_MLIE0, bar);
+        baz |= mesh_csr.ms(utra::mesh::SFR_MLIE_CR_MLIE0_CR_MLIE0, 1);
+        mesh_csr.wfo(utra::mesh::SFR_MLIE_CR_MLIE0_CR_MLIE0, baz);
+
+        let foo = mesh_csr.r(utra::mesh::SFR_MLSR_SR_MLSR0);
+        mesh_csr.wo(utra::mesh::SFR_MLSR_SR_MLSR0, foo);
+        let bar = mesh_csr.rf(utra::mesh::SFR_MLSR_SR_MLSR0_SR_MLSR0);
+        mesh_csr.rmwf(utra::mesh::SFR_MLSR_SR_MLSR0_SR_MLSR0, bar);
+        let mut baz = mesh_csr.zf(utra::mesh::SFR_MLSR_SR_MLSR0_SR_MLSR0, bar);
+        baz |= mesh_csr.ms(utra::mesh::SFR_MLSR_SR_MLSR0_SR_MLSR0, 1);
+        mesh_csr.wfo(utra::mesh::SFR_MLSR_SR_MLSR0_SR_MLSR0, baz);
+
+        let foo = mesh_csr.r(utra::mesh::SFR_MLSR_SR_MLSR1);
+        mesh_csr.wo(utra::mesh::SFR_MLSR_SR_MLSR1, foo);
+        let bar = mesh_csr.rf(utra::mesh::SFR_MLSR_SR_MLSR1_SR_MLSR1);
+        mesh_csr.rmwf(utra::mesh::SFR_MLSR_SR_MLSR1_SR_MLSR1, bar);
+        let mut baz = mesh_csr.zf(utra::mesh::SFR_MLSR_SR_MLSR1_SR_MLSR1, bar);
+        baz |= mesh_csr.ms(utra::mesh::SFR_MLSR_SR_MLSR1_SR_MLSR1, 1);
+        mesh_csr.wfo(utra::mesh::SFR_MLSR_SR_MLSR1_SR_MLSR1, baz);
+
+        let foo = mesh_csr.r(utra::mesh::SFR_MLSR_SR_MLSR2);
+        mesh_csr.wo(utra::mesh::SFR_MLSR_SR_MLSR2, foo);
+        let bar = mesh_csr.rf(utra::mesh::SFR_MLSR_SR_MLSR2_SR_MLSR2);
+        mesh_csr.rmwf(utra::mesh::SFR_MLSR_SR_MLSR2_SR_MLSR2, bar);
+        let mut baz = mesh_csr.zf(utra::mesh::SFR_MLSR_SR_MLSR2_SR_MLSR2, bar);
+        baz |= mesh_csr.ms(utra::mesh::SFR_MLSR_SR_MLSR2_SR_MLSR2, 1);
+        mesh_csr.wfo(utra::mesh::SFR_MLSR_SR_MLSR2_SR_MLSR2, baz);
+
+        let foo = mesh_csr.r(utra::mesh::SFR_MLSR_SR_MLSR3);
+        mesh_csr.wo(utra::mesh::SFR_MLSR_SR_MLSR3, foo);
+        let bar = mesh_csr.rf(utra::mesh::SFR_MLSR_SR_MLSR3_SR_MLSR3);
+        mesh_csr.rmwf(utra::mesh::SFR_MLSR_SR_MLSR3_SR_MLSR3, bar);
+        let mut baz = mesh_csr.zf(utra::mesh::SFR_MLSR_SR_MLSR3_SR_MLSR3, bar);
+        baz |= mesh_csr.ms(utra::mesh::SFR_MLSR_SR_MLSR3_SR_MLSR3, 1);
+        mesh_csr.wfo(utra::mesh::SFR_MLSR_SR_MLSR3_SR_MLSR3, baz);
+
+        let foo = mesh_csr.r(utra::mesh::SFR_MLSR_SR_MLSR4);
+        mesh_csr.wo(utra::mesh::SFR_MLSR_SR_MLSR4, foo);
+        let bar = mesh_csr.rf(utra::mesh::SFR_MLSR_SR_MLSR4_SR_MLSR4);
+        mesh_csr.rmwf(utra::mesh::SFR_MLSR_SR_MLSR4_SR_MLSR4, bar);
+        let mut baz = mesh_csr.zf(utra::mesh::SFR_MLSR_SR_MLSR4_SR_MLSR4, bar);
+        baz |= mesh_csr.ms(utra::mesh::SFR_MLSR_SR_MLSR4_SR_MLSR4, 1);
+        mesh_csr.wfo(utra::mesh::SFR_MLSR_SR_MLSR4_SR_MLSR4, baz);
+
+        let foo = mesh_csr.r(utra::mesh::SFR_MLSR_SR_MLSR5);
+        mesh_csr.wo(utra::mesh::SFR_MLSR_SR_MLSR5, foo);
+        let bar = mesh_csr.rf(utra::mesh::SFR_MLSR_SR_MLSR5_SR_MLSR5);
+        mesh_csr.rmwf(utra::mesh::SFR_MLSR_SR_MLSR5_SR_MLSR5, bar);
+        let mut baz = mesh_csr.zf(utra::mesh::SFR_MLSR_SR_MLSR5_SR_MLSR5, bar);
+        baz |= mesh_csr.ms(utra::mesh::SFR_MLSR_SR_MLSR5_SR_MLSR5, 1);
+        mesh_csr.wfo(utra::mesh::SFR_MLSR_SR_MLSR5_SR_MLSR5, baz);
+
+        let foo = mesh_csr.r(utra::mesh::SFR_MLSR_SR_MLSR6);
+        mesh_csr.wo(utra::mesh::SFR_MLSR_SR_MLSR6, foo);
+        let bar = mesh_csr.rf(utra::mesh::SFR_MLSR_SR_MLSR6_SR_MLSR6);
+        mesh_csr.rmwf(utra::mesh::SFR_MLSR_SR_MLSR6_SR_MLSR6, bar);
+        let mut baz = mesh_csr.zf(utra::mesh::SFR_MLSR_SR_MLSR6_SR_MLSR6, bar);
+        baz |= mesh_csr.ms(utra::mesh::SFR_MLSR_SR_MLSR6_SR_MLSR6, 1);
+        mesh_csr.wfo(utra::mesh::SFR_MLSR_SR_MLSR6_SR_MLSR6, baz);
+
+        let foo = mesh_csr.r(utra::mesh::SFR_MLSR_SR_MLSR7);
+        mesh_csr.wo(utra::mesh::SFR_MLSR_SR_MLSR7, foo);
+        let bar = mesh_csr.rf(utra::mesh::SFR_MLSR_SR_MLSR7_SR_MLSR7);
+        mesh_csr.rmwf(utra::mesh::SFR_MLSR_SR_MLSR7_SR_MLSR7, bar);
+        let mut baz = mesh_csr.zf(utra::mesh::SFR_MLSR_SR_MLSR7_SR_MLSR7, bar);
+        baz |= mesh_csr.ms(utra::mesh::SFR_MLSR_SR_MLSR7_SR_MLSR7, 1);
+        mesh_csr.wfo(utra::mesh::SFR_MLSR_SR_MLSR7_SR_MLSR7, baz);
+  }
+
+    #[test]
+    #[ignore]
+    fn compile_check_sensorc_csr() {
+        use super::*;
+        let mut sensorc_csr = CSR::new(HW_SENSORC_BASE as *mut u32);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_VDMASK0);
+        sensorc_csr.wo(utra::sensorc::SFR_VDMASK0, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_VDMASK0_CR_VDMASK0);
+        sensorc_csr.rmwf(utra::sensorc::SFR_VDMASK0_CR_VDMASK0, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_VDMASK0_CR_VDMASK0, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_VDMASK0_CR_VDMASK0, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_VDMASK0_CR_VDMASK0, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_VDMASK1);
+        sensorc_csr.wo(utra::sensorc::SFR_VDMASK1, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_VDMASK1_CR_VDMASK1);
+        sensorc_csr.rmwf(utra::sensorc::SFR_VDMASK1_CR_VDMASK1, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_VDMASK1_CR_VDMASK1, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_VDMASK1_CR_VDMASK1, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_VDMASK1_CR_VDMASK1, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_VDSR);
+        sensorc_csr.wo(utra::sensorc::SFR_VDSR, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_VDSR_VDFLAG);
+        sensorc_csr.rmwf(utra::sensorc::SFR_VDSR_VDFLAG, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_VDSR_VDFLAG, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_VDSR_VDFLAG, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_VDSR_VDFLAG, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_VDFR);
+        sensorc_csr.wo(utra::sensorc::SFR_VDFR, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_VDFR_VDFLAG);
+        sensorc_csr.rmwf(utra::sensorc::SFR_VDFR_VDFLAG, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_VDFR_VDFLAG, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_VDFR_VDFLAG, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_VDFR_VDFLAG, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_LDMASK);
+        sensorc_csr.wo(utra::sensorc::SFR_LDMASK, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_LDMASK_CR_LDMASK);
+        sensorc_csr.rmwf(utra::sensorc::SFR_LDMASK_CR_LDMASK, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_LDMASK_CR_LDMASK, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_LDMASK_CR_LDMASK, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_LDMASK_CR_LDMASK, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_LDSR);
+        sensorc_csr.wo(utra::sensorc::SFR_LDSR, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_LDSR_SR_LDSR);
+        sensorc_csr.rmwf(utra::sensorc::SFR_LDSR_SR_LDSR, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_LDSR_SR_LDSR, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_LDSR_SR_LDSR, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_LDSR_SR_LDSR, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_LDCFG);
+        sensorc_csr.wo(utra::sensorc::SFR_LDCFG, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_LDCFG_SFR_LDCFG);
+        sensorc_csr.rmwf(utra::sensorc::SFR_LDCFG_SFR_LDCFG, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_LDCFG_SFR_LDCFG, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_LDCFG_SFR_LDCFG, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_LDCFG_SFR_LDCFG, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_VDCFG_CR_VDCFG0);
+        sensorc_csr.wo(utra::sensorc::SFR_VDCFG_CR_VDCFG0, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_VDCFG_CR_VDCFG0_CR_VDCFG0);
+        sensorc_csr.rmwf(utra::sensorc::SFR_VDCFG_CR_VDCFG0_CR_VDCFG0, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_VDCFG_CR_VDCFG0_CR_VDCFG0, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_VDCFG_CR_VDCFG0_CR_VDCFG0, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_VDCFG_CR_VDCFG0_CR_VDCFG0, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_VDCFG_CR_VDCFG1);
+        sensorc_csr.wo(utra::sensorc::SFR_VDCFG_CR_VDCFG1, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_VDCFG_CR_VDCFG1_CR_VDCFG1);
+        sensorc_csr.rmwf(utra::sensorc::SFR_VDCFG_CR_VDCFG1_CR_VDCFG1, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_VDCFG_CR_VDCFG1_CR_VDCFG1, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_VDCFG_CR_VDCFG1_CR_VDCFG1, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_VDCFG_CR_VDCFG1_CR_VDCFG1, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_VDCFG_CR_VDCFG2);
+        sensorc_csr.wo(utra::sensorc::SFR_VDCFG_CR_VDCFG2, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_VDCFG_CR_VDCFG2_CR_VDCFG2);
+        sensorc_csr.rmwf(utra::sensorc::SFR_VDCFG_CR_VDCFG2_CR_VDCFG2, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_VDCFG_CR_VDCFG2_CR_VDCFG2, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_VDCFG_CR_VDCFG2_CR_VDCFG2, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_VDCFG_CR_VDCFG2_CR_VDCFG2, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_VDCFG_CR_VDCFG3);
+        sensorc_csr.wo(utra::sensorc::SFR_VDCFG_CR_VDCFG3, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_VDCFG_CR_VDCFG3_CR_VDCFG3);
+        sensorc_csr.rmwf(utra::sensorc::SFR_VDCFG_CR_VDCFG3_CR_VDCFG3, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_VDCFG_CR_VDCFG3_CR_VDCFG3, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_VDCFG_CR_VDCFG3_CR_VDCFG3, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_VDCFG_CR_VDCFG3_CR_VDCFG3, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_VDCFG_CR_VDCFG4);
+        sensorc_csr.wo(utra::sensorc::SFR_VDCFG_CR_VDCFG4, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_VDCFG_CR_VDCFG4_CR_VDCFG4);
+        sensorc_csr.rmwf(utra::sensorc::SFR_VDCFG_CR_VDCFG4_CR_VDCFG4, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_VDCFG_CR_VDCFG4_CR_VDCFG4, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_VDCFG_CR_VDCFG4_CR_VDCFG4, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_VDCFG_CR_VDCFG4_CR_VDCFG4, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_VDCFG_CR_VDCFG5);
+        sensorc_csr.wo(utra::sensorc::SFR_VDCFG_CR_VDCFG5, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_VDCFG_CR_VDCFG5_CR_VDCFG5);
+        sensorc_csr.rmwf(utra::sensorc::SFR_VDCFG_CR_VDCFG5_CR_VDCFG5, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_VDCFG_CR_VDCFG5_CR_VDCFG5, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_VDCFG_CR_VDCFG5_CR_VDCFG5, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_VDCFG_CR_VDCFG5_CR_VDCFG5, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_VDCFG_CR_VDCFG6);
+        sensorc_csr.wo(utra::sensorc::SFR_VDCFG_CR_VDCFG6, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_VDCFG_CR_VDCFG6_CR_VDCFG6);
+        sensorc_csr.rmwf(utra::sensorc::SFR_VDCFG_CR_VDCFG6_CR_VDCFG6, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_VDCFG_CR_VDCFG6_CR_VDCFG6, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_VDCFG_CR_VDCFG6_CR_VDCFG6, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_VDCFG_CR_VDCFG6_CR_VDCFG6, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_VDCFG_CR_VDCFG7);
+        sensorc_csr.wo(utra::sensorc::SFR_VDCFG_CR_VDCFG7, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_VDCFG_CR_VDCFG7_CR_VDCFG7);
+        sensorc_csr.rmwf(utra::sensorc::SFR_VDCFG_CR_VDCFG7_CR_VDCFG7, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_VDCFG_CR_VDCFG7_CR_VDCFG7, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_VDCFG_CR_VDCFG7_CR_VDCFG7, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_VDCFG_CR_VDCFG7_CR_VDCFG7, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_VDIP_ENA);
+        sensorc_csr.wo(utra::sensorc::SFR_VDIP_ENA, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_VDIP_ENA_VDENA);
+        sensorc_csr.rmwf(utra::sensorc::SFR_VDIP_ENA_VDENA, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_VDIP_ENA_VDENA, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_VDIP_ENA_VDENA, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_VDIP_ENA_VDENA, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_VDIP_TEST);
+        sensorc_csr.wo(utra::sensorc::SFR_VDIP_TEST, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_VDIP_TEST_VDTST);
+        sensorc_csr.rmwf(utra::sensorc::SFR_VDIP_TEST_VDTST, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_VDIP_TEST_VDTST, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_VDIP_TEST_VDTST, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_VDIP_TEST_VDTST, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_LDIP_TEST);
+        sensorc_csr.wo(utra::sensorc::SFR_LDIP_TEST, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_LDIP_TEST_LDTST);
+        sensorc_csr.rmwf(utra::sensorc::SFR_LDIP_TEST_LDTST, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_LDIP_TEST_LDTST, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_LDIP_TEST_LDTST, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_LDIP_TEST_LDTST, baz);
+
+        let foo = sensorc_csr.r(utra::sensorc::SFR_LDIP_FD);
+        sensorc_csr.wo(utra::sensorc::SFR_LDIP_FD, foo);
+        let bar = sensorc_csr.rf(utra::sensorc::SFR_LDIP_FD_SFR_LDIP_FD);
+        sensorc_csr.rmwf(utra::sensorc::SFR_LDIP_FD_SFR_LDIP_FD, bar);
+        let mut baz = sensorc_csr.zf(utra::sensorc::SFR_LDIP_FD_SFR_LDIP_FD, bar);
+        baz |= sensorc_csr.ms(utra::sensorc::SFR_LDIP_FD_SFR_LDIP_FD, 1);
+        sensorc_csr.wfo(utra::sensorc::SFR_LDIP_FD_SFR_LDIP_FD, baz);
+  }
+
+    #[test]
+    #[ignore]
+    fn compile_check_aobureg_csr() {
+        use super::*;
+        let mut aobureg_csr = CSR::new(HW_AOBUREG_BASE as *mut u32);
+
+        let foo = aobureg_csr.r(utra::aobureg::SFR_BUREG_CR_BUREGS0);
+        aobureg_csr.wo(utra::aobureg::SFR_BUREG_CR_BUREGS0, foo);
+        let bar = aobureg_csr.rf(utra::aobureg::SFR_BUREG_CR_BUREGS0_CR_BUREGS0);
+        aobureg_csr.rmwf(utra::aobureg::SFR_BUREG_CR_BUREGS0_CR_BUREGS0, bar);
+        let mut baz = aobureg_csr.zf(utra::aobureg::SFR_BUREG_CR_BUREGS0_CR_BUREGS0, bar);
+        baz |= aobureg_csr.ms(utra::aobureg::SFR_BUREG_CR_BUREGS0_CR_BUREGS0, 1);
+        aobureg_csr.wfo(utra::aobureg::SFR_BUREG_CR_BUREGS0_CR_BUREGS0, baz);
+
+        let foo = aobureg_csr.r(utra::aobureg::SFR_BUREG_CR_BUREGS1);
+        aobureg_csr.wo(utra::aobureg::SFR_BUREG_CR_BUREGS1, foo);
+        let bar = aobureg_csr.rf(utra::aobureg::SFR_BUREG_CR_BUREGS1_CR_BUREGS1);
+        aobureg_csr.rmwf(utra::aobureg::SFR_BUREG_CR_BUREGS1_CR_BUREGS1, bar);
+        let mut baz = aobureg_csr.zf(utra::aobureg::SFR_BUREG_CR_BUREGS1_CR_BUREGS1, bar);
+        baz |= aobureg_csr.ms(utra::aobureg::SFR_BUREG_CR_BUREGS1_CR_BUREGS1, 1);
+        aobureg_csr.wfo(utra::aobureg::SFR_BUREG_CR_BUREGS1_CR_BUREGS1, baz);
+
+        let foo = aobureg_csr.r(utra::aobureg::SFR_BUREG_CR_BUREGS2);
+        aobureg_csr.wo(utra::aobureg::SFR_BUREG_CR_BUREGS2, foo);
+        let bar = aobureg_csr.rf(utra::aobureg::SFR_BUREG_CR_BUREGS2_CR_BUREGS2);
+        aobureg_csr.rmwf(utra::aobureg::SFR_BUREG_CR_BUREGS2_CR_BUREGS2, bar);
+        let mut baz = aobureg_csr.zf(utra::aobureg::SFR_BUREG_CR_BUREGS2_CR_BUREGS2, bar);
+        baz |= aobureg_csr.ms(utra::aobureg::SFR_BUREG_CR_BUREGS2_CR_BUREGS2, 1);
+        aobureg_csr.wfo(utra::aobureg::SFR_BUREG_CR_BUREGS2_CR_BUREGS2, baz);
+
+        let foo = aobureg_csr.r(utra::aobureg::SFR_BUREG_CR_BUREGS3);
+        aobureg_csr.wo(utra::aobureg::SFR_BUREG_CR_BUREGS3, foo);
+        let bar = aobureg_csr.rf(utra::aobureg::SFR_BUREG_CR_BUREGS3_CR_BUREGS3);
+        aobureg_csr.rmwf(utra::aobureg::SFR_BUREG_CR_BUREGS3_CR_BUREGS3, bar);
+        let mut baz = aobureg_csr.zf(utra::aobureg::SFR_BUREG_CR_BUREGS3_CR_BUREGS3, bar);
+        baz |= aobureg_csr.ms(utra::aobureg::SFR_BUREG_CR_BUREGS3_CR_BUREGS3, 1);
+        aobureg_csr.wfo(utra::aobureg::SFR_BUREG_CR_BUREGS3_CR_BUREGS3, baz);
+
+        let foo = aobureg_csr.r(utra::aobureg::SFR_BUREG_CR_BUREGS4);
+        aobureg_csr.wo(utra::aobureg::SFR_BUREG_CR_BUREGS4, foo);
+        let bar = aobureg_csr.rf(utra::aobureg::SFR_BUREG_CR_BUREGS4_CR_BUREGS4);
+        aobureg_csr.rmwf(utra::aobureg::SFR_BUREG_CR_BUREGS4_CR_BUREGS4, bar);
+        let mut baz = aobureg_csr.zf(utra::aobureg::SFR_BUREG_CR_BUREGS4_CR_BUREGS4, bar);
+        baz |= aobureg_csr.ms(utra::aobureg::SFR_BUREG_CR_BUREGS4_CR_BUREGS4, 1);
+        aobureg_csr.wfo(utra::aobureg::SFR_BUREG_CR_BUREGS4_CR_BUREGS4, baz);
+
+        let foo = aobureg_csr.r(utra::aobureg::SFR_BUREG_CR_BUREGS5);
+        aobureg_csr.wo(utra::aobureg::SFR_BUREG_CR_BUREGS5, foo);
+        let bar = aobureg_csr.rf(utra::aobureg::SFR_BUREG_CR_BUREGS5_CR_BUREGS5);
+        aobureg_csr.rmwf(utra::aobureg::SFR_BUREG_CR_BUREGS5_CR_BUREGS5, bar);
+        let mut baz = aobureg_csr.zf(utra::aobureg::SFR_BUREG_CR_BUREGS5_CR_BUREGS5, bar);
+        baz |= aobureg_csr.ms(utra::aobureg::SFR_BUREG_CR_BUREGS5_CR_BUREGS5, 1);
+        aobureg_csr.wfo(utra::aobureg::SFR_BUREG_CR_BUREGS5_CR_BUREGS5, baz);
+
+        let foo = aobureg_csr.r(utra::aobureg::SFR_BUREG_CR_BUREGS6);
+        aobureg_csr.wo(utra::aobureg::SFR_BUREG_CR_BUREGS6, foo);
+        let bar = aobureg_csr.rf(utra::aobureg::SFR_BUREG_CR_BUREGS6_CR_BUREGS6);
+        aobureg_csr.rmwf(utra::aobureg::SFR_BUREG_CR_BUREGS6_CR_BUREGS6, bar);
+        let mut baz = aobureg_csr.zf(utra::aobureg::SFR_BUREG_CR_BUREGS6_CR_BUREGS6, bar);
+        baz |= aobureg_csr.ms(utra::aobureg::SFR_BUREG_CR_BUREGS6_CR_BUREGS6, 1);
+        aobureg_csr.wfo(utra::aobureg::SFR_BUREG_CR_BUREGS6_CR_BUREGS6, baz);
+
+        let foo = aobureg_csr.r(utra::aobureg::SFR_BUREG_CR_BUREGS7);
+        aobureg_csr.wo(utra::aobureg::SFR_BUREG_CR_BUREGS7, foo);
+        let bar = aobureg_csr.rf(utra::aobureg::SFR_BUREG_CR_BUREGS7_CR_BUREGS7);
+        aobureg_csr.rmwf(utra::aobureg::SFR_BUREG_CR_BUREGS7_CR_BUREGS7, bar);
+        let mut baz = aobureg_csr.zf(utra::aobureg::SFR_BUREG_CR_BUREGS7_CR_BUREGS7, bar);
+        baz |= aobureg_csr.ms(utra::aobureg::SFR_BUREG_CR_BUREGS7_CR_BUREGS7, 1);
+        aobureg_csr.wfo(utra::aobureg::SFR_BUREG_CR_BUREGS7_CR_BUREGS7, baz);
+  }
+
+    #[test]
+    #[ignore]
+    fn compile_check_ao_sysctrl_csr() {
+        use super::*;
+        let mut ao_sysctrl_csr = CSR::new(HW_AO_SYSCTRL_BASE as *mut u32);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::CR_CLK32KSEL);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::CR_CLK32KSEL, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::CR_CLK32KSEL_CR_CLK32KSEL);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::CR_CLK32KSEL_CR_CLK32KSEL, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::CR_CLK32KSEL_CR_CLK32KSEL, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::CR_CLK32KSEL_CR_CLK32KSEL, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::CR_CLK32KSEL_CR_CLK32KSEL, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::CR_CLK1HZFD);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::CR_CLK1HZFD, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::CR_CLK1HZFD_CR_CLK1HZFD);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::CR_CLK1HZFD_CR_CLK1HZFD, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::CR_CLK1HZFD_CR_CLK1HZFD, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::CR_CLK1HZFD_CR_CLK1HZFD, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::CR_CLK1HZFD_CR_CLK1HZFD, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::CR_WKUPMASK);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::CR_WKUPMASK, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::CR_WKUPMASK_CR_WKUPMASK);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::CR_WKUPMASK_CR_WKUPMASK, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::CR_WKUPMASK_CR_WKUPMASK, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::CR_WKUPMASK_CR_WKUPMASK, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::CR_WKUPMASK_CR_WKUPMASK, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::CR_RSTCRMASK);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::CR_RSTCRMASK, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::CR_RSTCRMASK_CR_RSTCRMASK);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::CR_RSTCRMASK_CR_RSTCRMASK, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::CR_RSTCRMASK_CR_RSTCRMASK, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::CR_RSTCRMASK_CR_RSTCRMASK, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::CR_RSTCRMASK_CR_RSTCRMASK, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUCR);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUCR, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUCR_SFRPMUCR);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUCR_SFRPMUCR, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUCR_SFRPMUCR, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUCR_SFRPMUCR, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUCR_SFRPMUCR, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUCRLP);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUCRLP, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUCRLP_SFRPMUCRLP);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUCRLP_SFRPMUCRLP, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUCRLP_SFRPMUCRLP, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUCRLP_SFRPMUCRLP, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUCRLP_SFRPMUCRLP, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUCRPD);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUCRPD, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUCRPD_SFRPMUCRPD);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUCRPD_SFRPMUCRPD, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUCRPD_SFRPMUCRPD, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUCRPD_SFRPMUCRPD, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUCRPD_SFRPMUCRPD, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUDFT);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUDFT, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUDFT_SFRPMUDFT);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUDFT_SFRPMUDFT, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUDFT_SFRPMUDFT, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUDFT_SFRPMUDFT, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUDFT_SFRPMUDFT, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUTRM0);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUTRM0, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUTRM0_SFRPMUTRM);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUTRM0_SFRPMUTRM, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUTRM0_SFRPMUTRM, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUTRM0_SFRPMUTRM, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUTRM0_SFRPMUTRM, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUTRM1);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUTRM1, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUTRM1_SFRPMUTRM);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUTRM1_SFRPMUTRM, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUTRM1_SFRPMUTRM, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUTRM1_SFRPMUTRM, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUTRM1_SFRPMUTRM, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUTRMLP0);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUTRMLP0, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUTRMLP0_SFRPMUTRMLP);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUTRMLP0_SFRPMUTRMLP, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUTRMLP0_SFRPMUTRMLP, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUTRMLP0_SFRPMUTRMLP, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUTRMLP0_SFRPMUTRMLP, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUTRMLP1);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUTRMLP1, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUTRMLP1_SFRPMUTRMLP);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUTRMLP1_SFRPMUTRMLP, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUTRMLP1_SFRPMUTRMLP, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUTRMLP1_SFRPMUTRMLP, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUTRMLP1_SFRPMUTRMLP, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_OSCCR);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_OSCCR, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_OSCCR_SFROSCCR);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_OSCCR_SFROSCCR, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_OSCCR_SFROSCCR, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_OSCCR_SFROSCCR, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_OSCCR_SFROSCCR, baz);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_OSCCR_SFROSCTRM);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_OSCCR_SFROSCTRM, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_OSCCR_SFROSCTRM, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_OSCCR_SFROSCTRM, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_OSCCR_SFROSCTRM, baz);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_OSCCR_SFROSCCRLP);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_OSCCR_SFROSCCRLP, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_OSCCR_SFROSCCRLP, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_OSCCR_SFROSCCRLP, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_OSCCR_SFROSCCRLP, baz);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_OSCCR_SFROSCTRMLP);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_OSCCR_SFROSCTRMLP, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_OSCCR_SFROSCTRMLP, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_OSCCR_SFROSCTRMLP, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_OSCCR_SFROSCTRMLP, baz);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_OSCCR_SFROSCCRPD);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_OSCCR_SFROSCCRPD, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_OSCCR_SFROSCCRPD, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_OSCCR_SFROSCCRPD, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_OSCCR_SFROSCCRPD, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUSR);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUSR, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUSR_SFR_PMUSR);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUSR_SFR_PMUSR, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUSR_SFR_PMUSR, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUSR_SFR_PMUSR, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUSR_SFR_PMUSR, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUFR);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUFR, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUFR_SFR_PMUFR);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUFR_SFR_PMUFR, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUFR_SFR_PMUFR, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUFR_SFR_PMUFR, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUFR_SFR_PMUFR, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_AOFR);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_AOFR, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_AOFR_SFR_AOFR);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_AOFR_SFR_AOFR, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_AOFR_SFR_AOFR, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_AOFR_SFR_AOFR, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_AOFR_SFR_AOFR, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_PMUPDAR);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_PMUPDAR, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_PMUPDAR_SFR_PMUPDAR);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_PMUPDAR_SFR_PMUPDAR, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_PMUPDAR_SFR_PMUPDAR, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_PMUPDAR_SFR_PMUPDAR, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_PMUPDAR_SFR_PMUPDAR, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::AR_AOPERI_CLRINT);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::AR_AOPERI_CLRINT, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::AR_AOPERI_CLRINT_AR_AOPERI_CLRINT);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::AR_AOPERI_CLRINT_AR_AOPERI_CLRINT, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::AR_AOPERI_CLRINT_AR_AOPERI_CLRINT, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::AR_AOPERI_CLRINT_AR_AOPERI_CLRINT, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::AR_AOPERI_CLRINT_AR_AOPERI_CLRINT, baz);
+
+        let foo = ao_sysctrl_csr.r(utra::ao_sysctrl::SFR_IOX);
+        ao_sysctrl_csr.wo(utra::ao_sysctrl::SFR_IOX, foo);
+        let bar = ao_sysctrl_csr.rf(utra::ao_sysctrl::SFR_IOX_SFR_IOX);
+        ao_sysctrl_csr.rmwf(utra::ao_sysctrl::SFR_IOX_SFR_IOX, bar);
+        let mut baz = ao_sysctrl_csr.zf(utra::ao_sysctrl::SFR_IOX_SFR_IOX, bar);
+        baz |= ao_sysctrl_csr.ms(utra::ao_sysctrl::SFR_IOX_SFR_IOX, 1);
+        ao_sysctrl_csr.wfo(utra::ao_sysctrl::SFR_IOX_SFR_IOX, baz);
+  }
+
+    #[test]
+    #[ignore]
+    fn compile_check_dkpc_csr() {
+        use super::*;
+        let mut dkpc_csr = CSR::new(HW_DKPC_BASE as *mut u32);
+
+        let foo = dkpc_csr.r(utra::dkpc::SFR_CFG0);
+        dkpc_csr.wo(utra::dkpc::SFR_CFG0, foo);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_CFG0_KPOPO0);
+        dkpc_csr.rmwf(utra::dkpc::SFR_CFG0_KPOPO0, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_CFG0_KPOPO0, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_CFG0_KPOPO0, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_CFG0_KPOPO0, baz);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_CFG0_KPOPO1);
+        dkpc_csr.rmwf(utra::dkpc::SFR_CFG0_KPOPO1, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_CFG0_KPOPO1, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_CFG0_KPOPO1, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_CFG0_KPOPO1, baz);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_CFG0_KPOOE0);
+        dkpc_csr.rmwf(utra::dkpc::SFR_CFG0_KPOOE0, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_CFG0_KPOOE0, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_CFG0_KPOOE0, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_CFG0_KPOOE0, baz);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_CFG0_KPOOE1);
+        dkpc_csr.rmwf(utra::dkpc::SFR_CFG0_KPOOE1, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_CFG0_KPOOE1, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_CFG0_KPOOE1, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_CFG0_KPOOE1, baz);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_CFG0_DKPCEN);
+        dkpc_csr.rmwf(utra::dkpc::SFR_CFG0_DKPCEN, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_CFG0_DKPCEN, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_CFG0_DKPCEN, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_CFG0_DKPCEN, baz);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_CFG0_AUTOSLEEPEN);
+        dkpc_csr.rmwf(utra::dkpc::SFR_CFG0_AUTOSLEEPEN, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_CFG0_AUTOSLEEPEN, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_CFG0_AUTOSLEEPEN, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_CFG0_AUTOSLEEPEN, baz);
+
+        let foo = dkpc_csr.r(utra::dkpc::SFR_CFG1);
+        dkpc_csr.wo(utra::dkpc::SFR_CFG1, foo);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_CFG1_CFG_STEP);
+        dkpc_csr.rmwf(utra::dkpc::SFR_CFG1_CFG_STEP, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_CFG1_CFG_STEP, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_CFG1_CFG_STEP, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_CFG1_CFG_STEP, baz);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_CFG1_CFG_FILTER);
+        dkpc_csr.rmwf(utra::dkpc::SFR_CFG1_CFG_FILTER, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_CFG1_CFG_FILTER, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_CFG1_CFG_FILTER, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_CFG1_CFG_FILTER, baz);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_CFG1_CFG_CNT1MS);
+        dkpc_csr.rmwf(utra::dkpc::SFR_CFG1_CFG_CNT1MS, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_CFG1_CFG_CNT1MS, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_CFG1_CFG_CNT1MS, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_CFG1_CFG_CNT1MS, baz);
+
+        let foo = dkpc_csr.r(utra::dkpc::SFR_CFG2);
+        dkpc_csr.wo(utra::dkpc::SFR_CFG2, foo);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_CFG2_CFG_CNT);
+        dkpc_csr.rmwf(utra::dkpc::SFR_CFG2_CFG_CNT, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_CFG2_CFG_CNT, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_CFG2_CFG_CNT, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_CFG2_CFG_CNT, baz);
+
+        let foo = dkpc_csr.r(utra::dkpc::SFR_CFG3);
+        dkpc_csr.wo(utra::dkpc::SFR_CFG3, foo);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_CFG3_KPNODERISEEN);
+        dkpc_csr.rmwf(utra::dkpc::SFR_CFG3_KPNODERISEEN, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_CFG3_KPNODERISEEN, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_CFG3_KPNODERISEEN, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_CFG3_KPNODERISEEN, baz);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_CFG3_KPNODEFALLEN);
+        dkpc_csr.rmwf(utra::dkpc::SFR_CFG3_KPNODEFALLEN, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_CFG3_KPNODEFALLEN, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_CFG3_KPNODEFALLEN, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_CFG3_KPNODEFALLEN, baz);
+
+        let foo = dkpc_csr.r(utra::dkpc::SFR_SR0);
+        dkpc_csr.wo(utra::dkpc::SFR_SR0, foo);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_SR0_KPNODEREG);
+        dkpc_csr.rmwf(utra::dkpc::SFR_SR0_KPNODEREG, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_SR0_KPNODEREG, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_SR0_KPNODEREG, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_SR0_KPNODEREG, baz);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_SR0_KPI0_PI);
+        dkpc_csr.rmwf(utra::dkpc::SFR_SR0_KPI0_PI, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_SR0_KPI0_PI, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_SR0_KPI0_PI, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_SR0_KPI0_PI, baz);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_SR0_KPI1_PI);
+        dkpc_csr.rmwf(utra::dkpc::SFR_SR0_KPI1_PI, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_SR0_KPI1_PI, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_SR0_KPI1_PI, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_SR0_KPI1_PI, baz);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_SR0_KPI2_PI);
+        dkpc_csr.rmwf(utra::dkpc::SFR_SR0_KPI2_PI, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_SR0_KPI2_PI, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_SR0_KPI2_PI, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_SR0_KPI2_PI, baz);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_SR0_KPI3_PI);
+        dkpc_csr.rmwf(utra::dkpc::SFR_SR0_KPI3_PI, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_SR0_KPI3_PI, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_SR0_KPI3_PI, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_SR0_KPI3_PI, baz);
+
+        let foo = dkpc_csr.r(utra::dkpc::SFR_SR1);
+        dkpc_csr.wo(utra::dkpc::SFR_SR1, foo);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_SR1_SFR_SR1);
+        dkpc_csr.rmwf(utra::dkpc::SFR_SR1_SFR_SR1, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_SR1_SFR_SR1, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_SR1_SFR_SR1, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_SR1_SFR_SR1, baz);
+
+        let foo = dkpc_csr.r(utra::dkpc::SFR_CFG4);
+        dkpc_csr.wo(utra::dkpc::SFR_CFG4, foo);
+        let bar = dkpc_csr.rf(utra::dkpc::SFR_CFG4_SFR_CFG4);
+        dkpc_csr.rmwf(utra::dkpc::SFR_CFG4_SFR_CFG4, bar);
+        let mut baz = dkpc_csr.zf(utra::dkpc::SFR_CFG4_SFR_CFG4, bar);
+        baz |= dkpc_csr.ms(utra::dkpc::SFR_CFG4_SFR_CFG4, 1);
+        dkpc_csr.wfo(utra::dkpc::SFR_CFG4_SFR_CFG4, baz);
+  }
+
     #[test]
     #[ignore]
     fn compile_check_udma_ctrl_csr() {