deglitcher
#1104
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This behavior comes from the one gate delay that is missing in the control of the first flip-flop in the 74193. If you add a delay element here, the problem disappears. |
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Although the 74193 is a synchronous counter it still have glitches in the simulation (it also may do that on a real device - I haven't tested that yet). In real life those glitches might be short enough to not trigger following logic, or due to capacitances on the wires never even reach the voltage thresholds.
But when this happens it's not totally uncommon to "fix" this problem with a small lowpass RC-filter on the wire, deleting the rise just a few ns to make the glitch go away.
In Digital this lowpass filter can easily be emulated with an AND-gate plus a delay element, but it adds clutter to the schematics, so it would be nice to have a really small "deglitcher" component.
A funny thing that happens in the attached design is that the glitch counts (after clicking the button 16 times) are different on each run.
deglitcher.zip
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