Analyze circuit with different clocks into flip flops

[ghost]

I need to analyze and synthesize some code however I can not analyze the circuit if I have different clocks in my flip flops. However If I tie them all to the same clock that would be wrong. Im new to the software any help would be great, thanks!

[hneemann]

The analysis of circuits with multiple clock sources is not supported.
And I'm afraid that this will not change anytime soon.

[ghost]

ah damn well thats a wee bit of a problem but I appreciate the response! thank you and have a good day!

[hneemann]

If the circuit does not use truly different clock domains, it may be possible to represent it with one clock.
Alternatively, you could create a CUPL file using one clock and modify it slightly by hand.

[ghost]

I will have to investigate these avenues a little more. Honestly a project was kind of dumped at my feet and the more I look into it the more of a hole I seem to be in. I have literally no VHDL experience (better start learning) BUT I will take your advice to heart and see if its applicable down the road. Also thank you so much for your reply, I really do appreciate it so much that you respond and stuff, thank you!

[hneemann]

If you have a working toolchain for VHDL synthesis at hand, you can easily export your circuit to VHDL.

[ghost]

Hmm im sorry im so lost but I dont know if I understand what ya said. So I have a digital circuit and theres are two avenues to synthesis the corresponding VHDL code and getting the JEDEC file which I use to program my CPLD I believe (im sorry this is my first day really being able to look at this project so I am probably butchering it). So the way Ive done it (just simple exports in order to validate that I can do the process) I create something in digital analyze and synthesis then I transfer it over through ATMISP. The other way involves using atmel prochip designer however the person who left this project was doing it through that way BUT when he would try to convert digital circuits with flip-flops with multiple clocks he'd run into an issue but I guess dude didnt mention it I looked in his documents.... Sorry for the ramble