diff --git a/devices/common_patches/ccm_cg_gpio5.yaml b/devices/common_patches/ccm_cg_gpio5.yaml new file mode 100644 index 000000000000..a324d22940a6 --- /dev/null +++ b/devices/common_patches/ccm_cg_gpio5.yaml @@ -0,0 +1,11 @@ +# Clock gate 15 in CCM[CCGR1] is missing from 1050 and 1060 MCUs. +# It isn't reserved according to the reference manual. This +# clock gate is for GPIO5. +CCM: + CCGR1: + _modify: + CG15: + description: gpio5 clock (gpio5_clk_enable) + bitOffset: 30 + bitWidth: 2 + access: read-write diff --git a/devices/imxrt1021.yaml b/devices/imxrt1021.yaml index 642417df5148..f73a4926c9af 100644 --- a/devices/imxrt1021.yaml +++ b/devices/imxrt1021.yaml @@ -2,6 +2,7 @@ _svd: "../svd/imxrt1021.svd" _include: - "common.yaml" + - "common_patches/ccm_cg_gpio5.yaml" - "common_patches/pwm1/submodule_cluster.yaml" - "common_patches/usb.yaml" - "common_patches/dma0/tcd_cluster.yaml" diff --git a/devices/imxrt1051.yaml b/devices/imxrt1051.yaml index 544ff3d21fc4..23c6e63d9482 100644 --- a/devices/imxrt1051.yaml +++ b/devices/imxrt1051.yaml @@ -2,6 +2,7 @@ _svd: "../svd/imxrt1051.svd" _include: - "common.yaml" + - "common_patches/ccm_cg_gpio5.yaml" - "common_patches/pwm1/submodule_cluster.yaml" - "common_patches/usb1.yaml" - "common_patches/dma0/tcd_cluster.yaml" diff --git a/devices/imxrt1052.yaml b/devices/imxrt1052.yaml index 6c17c0077d54..1801994c0ac5 100644 --- a/devices/imxrt1052.yaml +++ b/devices/imxrt1052.yaml @@ -2,6 +2,7 @@ _svd: "../svd/imxrt1052.svd" _include: - "common.yaml" + - "common_patches/ccm_cg_gpio5.yaml" - "common_patches/pwm1/submodule_cluster.yaml" - "common_patches/usb1.yaml" - "common_patches/dma0/tcd_cluster.yaml" diff --git a/devices/imxrt1061.yaml b/devices/imxrt1061.yaml index af3fe86a841c..d3cc86084e06 100644 --- a/devices/imxrt1061.yaml +++ b/devices/imxrt1061.yaml @@ -2,6 +2,7 @@ _svd: "../svd/imxrt1061.svd" _include: - "common.yaml" + - "common_patches/ccm_cg_gpio5.yaml" - "common_patches/pwm1/submodule_cluster.yaml" - "common_patches/usb1.yaml" - "common_patches/dma0/tcd_cluster.yaml" diff --git a/devices/imxrt1062.yaml b/devices/imxrt1062.yaml index 3fc1ddb7fc2a..bf804b9a7807 100644 --- a/devices/imxrt1062.yaml +++ b/devices/imxrt1062.yaml @@ -2,6 +2,7 @@ _svd: "../svd/imxrt1062.svd" _include: - "common.yaml" + - "common_patches/ccm_cg_gpio5.yaml" - "common_patches/pwm1/submodule_cluster.yaml" - "common_patches/usb1.yaml" - "common_patches/dma0/tcd_cluster.yaml" diff --git a/devices/imxrt1064.yaml b/devices/imxrt1064.yaml index b770c6eb436a..cb1a4696d554 100644 --- a/devices/imxrt1064.yaml +++ b/devices/imxrt1064.yaml @@ -2,6 +2,7 @@ _svd: "../svd/imxrt1064.svd" _include: - "common.yaml" + - "common_patches/ccm_cg_gpio5.yaml" - "common_patches/pwm1/submodule_cluster.yaml" - "common_patches/usb1.yaml" - "common_patches/dma0/tcd_cluster.yaml" diff --git a/src/blocks/imxrt1021/ccm.rs b/src/blocks/imxrt1021/ccm.rs index 33b1123af10d..4a428f2b44f3 100644 --- a/src/blocks/imxrt1021/ccm.rs +++ b/src/blocks/imxrt1021/ccm.rs @@ -2720,6 +2720,14 @@ pub mod CCGR1 { pub mod W {} pub mod RW {} } + #[doc = "gpio5 clock (gpio5_clk_enable)"] + pub mod CG15 { + pub const offset: u32 = 30; + pub const mask: u32 = 0x03 << offset; + pub mod R {} + pub mod W {} + pub mod RW {} + } } #[doc = "CCM Clock Gating Register 2"] pub mod CCGR2 { diff --git a/src/blocks/imxrt1051/ccm.rs b/src/blocks/imxrt1051/ccm.rs index 7311625bf8a1..b2769dd897a3 100644 --- a/src/blocks/imxrt1051/ccm.rs +++ b/src/blocks/imxrt1051/ccm.rs @@ -2927,6 +2927,14 @@ pub mod CCGR1 { pub mod W {} pub mod RW {} } + #[doc = "gpio5 clock (gpio5_clk_enable)"] + pub mod CG15 { + pub const offset: u32 = 30; + pub const mask: u32 = 0x03 << offset; + pub mod R {} + pub mod W {} + pub mod RW {} + } } #[doc = "CCM Clock Gating Register 2"] pub mod CCGR2 { diff --git a/src/blocks/imxrt1061/ccm.rs b/src/blocks/imxrt1061/ccm.rs index bf4c7d3938bf..c85933079c5b 100644 --- a/src/blocks/imxrt1061/ccm.rs +++ b/src/blocks/imxrt1061/ccm.rs @@ -2968,6 +2968,14 @@ pub mod CCGR1 { pub mod W {} pub mod RW {} } + #[doc = "gpio5 clock (gpio5_clk_enable)"] + pub mod CG15 { + pub const offset: u32 = 30; + pub const mask: u32 = 0x03 << offset; + pub mod R {} + pub mod W {} + pub mod RW {} + } } #[doc = "CCM Clock Gating Register 2"] pub mod CCGR2 {