From fbec8ef97def881dd537717da83fb83b9c268672 Mon Sep 17 00:00:00 2001 From: Cesar Fuguet Date: Wed, 8 Jan 2025 16:52:55 +0100 Subject: [PATCH] Add missing datatype to the rvfi_mem_paddr port --- core/load_store_unit.sv | 2 +- core/store_buffer.sv | 6 +----- core/store_unit.sv | 2 +- verif/core-v-verif | 2 +- 4 files changed, 4 insertions(+), 8 deletions(-) diff --git a/core/load_store_unit.sv b/core/load_store_unit.sv index 134b6a3dc1..be096230d0 100644 --- a/core/load_store_unit.sv +++ b/core/load_store_unit.sv @@ -155,7 +155,7 @@ module load_store_unit // RVFI inforamtion - RVFI output lsu_ctrl_t rvfi_lsu_ctrl_o, // RVFI information - RVFI - output [CVA6Cfg.PLEN-1:0] rvfi_mem_paddr_o + output logic [CVA6Cfg.PLEN-1:0] rvfi_mem_paddr_o ); // data is misaligned diff --git a/core/store_buffer.sv b/core/store_buffer.sv index 3a39d1c2eb..3c973e826d 100644 --- a/core/store_buffer.sv +++ b/core/store_buffer.sv @@ -150,11 +150,7 @@ module store_buffer assign req_port_o.data_be = commit_queue_q[commit_read_pointer_q].be; assign req_port_o.data_size = commit_queue_q[commit_read_pointer_q].data_size; - always_ff @(posedge clk_i) begin : rvfi_mem_paddr_ff - if (commit_i) begin - rvfi_mem_paddr_o <= speculative_queue_q[speculative_read_pointer_q].address; - end - end + assign rvfi_mem_paddr_o = speculative_queue_q[speculative_read_pointer_q].address; always_comb begin : store_if automatic logic [$clog2(DEPTH_COMMIT):0] commit_status_cnt; diff --git a/core/store_unit.sv b/core/store_unit.sv index d000623a25..141763dda7 100644 --- a/core/store_unit.sv +++ b/core/store_unit.sv @@ -59,7 +59,7 @@ module store_unit // Virtual address - TO_BE_COMPLETED output logic [CVA6Cfg.VLEN-1:0] vaddr_o, // RVFI information - RVFI - output [CVA6Cfg.PLEN-1:0] rvfi_mem_paddr_o, + output logic [CVA6Cfg.PLEN-1:0] rvfi_mem_paddr_o, // Transformed trap instruction out - TO_BE_COMPLETED output logic [31:0] tinst_o, // TO_BE_COMPLETED - TO_BE_COMPLETED diff --git a/verif/core-v-verif b/verif/core-v-verif index 464bf7a0d7..f73efc438e 160000 --- a/verif/core-v-verif +++ b/verif/core-v-verif @@ -1 +1 @@ -Subproject commit 464bf7a0d730eaf614acac258b412829217b6465 +Subproject commit f73efc438e5611822167a9d594407a0043ddf6f9