No WiFi after SD issue #183
Replies: 2 comments 1 reply
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Additional note: I tried to access/check/set the NVRAM configuration, but that's not working... I power off, hold up examine, hit reset, release examine. Nothing. No lights whatsoever. HOWEVER... I now see imsai (but not imsai8080) on my network.... If I reset from ere, I get the run light lit, and most of the lights are on and something appears to be running. |
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After rebooting (pressing "EN" on ESP) i'm now getting wifi messages (imsai showing up on newtorks, but not imsai8080 still): Release 1.38-dev, Copyright (C) 1987-2022 by Udo Munk CPU speed is 4 MHz, CPU executes undocumented instructions RAM 0000H - FFFFH SIO PORT MAP: �[H�[2JE (70787) wifi:esf_buf: t=2 l=216 max:32, alloc:32 no eb, TXQ_BLOCK=4000 |
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Hey all, I'm working my way through getting my machine running again... It ran on my shelf without issue for a couple years...
A few days ago I looked up at my shelf and all my retros were purring away with blinky lights, but the Imsai was dark...
So tonight I pulled it down and as I suspected the SD card had died.
So... I downloaded the software, created a new SD card... Connecting a serial monitor, i see the stream below - not seeing any obvious errors.
The lights are on, when I turn it to PWR ON, but no IMSAI shows up on my wifi...
One question: is there a limit on SD size? I had a 64GB laying around and used it... but I know on some of these there are limits.
Thanks,
Tom
--Here's the boot up log--
rst:0x1 (POWERON_RESET),boot:0x3f (SPI_FAST_FLASH_BOOT)
configsip: 188777542, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:1
load:0x3fff0018,len:4
load:0x3fff001c,len:4492
load:0x40078000,len:13324
ho 0 tail 12 room 4
load:0x40080400,len:3796
entry 0x40080624
�[0;32mI (359) psram: This chip is ESP32-PICO�[0m
�[0;32mI (359) spiram: Found 64MBit SPI RAM device�[0m
�[0;32mI (359) spiram: SPI RAM mode: flash 80m sram 80m�[0m
�[0;32mI (362) spiram: PSRAM initialized, cache is in low/high (2-core) mode.�[0m
�[0;32mI (369) cpu_start: Pro cpu up.�[0m
�[0;32mI (373) cpu_start: Application information:�[0m
�[0;32mI (378) cpu_start: Project name: imsaisim_esp32�[0m
�[0;32mI (384) cpu_start: App version: v1.11.0�[0m
�[0;32mI (388) cpu_start: Compile time: Mar 19 2023 00:37:52�[0m
�[0;32mI (395) cpu_start: ELF file SHA256: ea07ca307884de9c...�[0m
�[0;32mI (401) cpu_start: ESP-IDF: v4.0.2-5-ged96bbd56c�[0m
�[0;32mI (407) cpu_start: Starting app cpu, entry point is 0x40081d10�[0m
�[0;32mI (0) cpu_start: App cpu up.�[0m
�[0;32mI (903) spiram: SPI SRAM memory test OK�[0m
�[0;32mI (938) heap_init: Initializing. RAM available for dynamic allocation:�[0m
�[0;32mI (938) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM�[0m
�[0;32mI (940) heap_init: At 3FFC7260 len 00018DA0 (99 KiB): DRAM�[0m
�[0;32mI (946) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM�[0m
�[0;32mI (953) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM�[0m
�[0;32mI (959) heap_init: At 4009EF78 len 00001088 (4 KiB): IRAM�[0m
�[0;32mI (965) cpu_start: Pro cpu start user code�[0m
�[0;32mI (970) spiram: Adding pool of 3621K of external SPI memory to heap allocator�[0m
�[0;32mI (991) spi_flash: detected chip: gd�[0m
�[0;32mI (991) spi_flash: flash io: qio�[0m
�[0;32mI (991) cpu_start: Starting scheduler on PRO CPU.�[0m
�[0;32mI (0) cpu_start: Starting scheduler on APP CPU.�[0m
�[0;32mI (1059) nvs: Reading settings from NVS �[0m
�[0;32mI (1060) nvs: settings = 00000958�[0m
�[0;32mI (1060) esp32_boot: Log Level set to NONE�[0m
�[0;32mI (1689) phy: phy_version: 4390, 6b3c1f2, Sep 10 2020, 15:09:07, 0, 0�[0m
####### ##### ### ##### ### # #
# # # # # # # # ## ##
# # # # # # # # # # #
##### # # ##### ##### # # #
# # # # # # #
# # # # # # # #
####### ##### ### ##### ### # #
Release 1.38-dev, Copyright (C) 1987-2022 by Udo Munk
ESP32 IMSAI 8080 Simulation Release 1.19 (ESP32)
Copyright (C) 2008-2022 by Udo Munk & David McNaughton
CPU speed is 4 MHz, CPU executes undocumented instructions
RAM 0000H - FFFFH
MPU-B Banked ROM/RAM enabled
MMU has 7 additional RAM banks of 48 KB
SIO PORT MAP:
SIO1.portA = WEBTTY UART0
SIO1.portB = VIOKBD
SIO2.portA = WEBPTR UART1
SIO2.portB = MODEM
LPT = WEBLPT FILE
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