From 5848d708e3fc5d7ba78a128dcc6d120b0b19bc83 Mon Sep 17 00:00:00 2001 From: Samuel Riedel Date: Mon, 9 Jan 2023 14:06:36 +0100 Subject: [PATCH] [hardware] Fix bug in the DMA's distributed midend When a DMA request finishes in the same cycle as we cut one off we have to wait a cycle. This will need proper handshaking in the future --- hardware/deps/idma/src/midends/idma_distributed_midend.sv | 1 + 1 file changed, 1 insertion(+) diff --git a/hardware/deps/idma/src/midends/idma_distributed_midend.sv b/hardware/deps/idma/src/midends/idma_distributed_midend.sv index cfdcd5a7e..88bd176cb 100644 --- a/hardware/deps/idma/src/midends/idma_distributed_midend.sv +++ b/hardware/deps/idma/src/midends/idma_distributed_midend.sv @@ -118,6 +118,7 @@ module idma_distributed_midend #( // Do not interfere with metadata per default tie_off_trans_complete_d = '0; for (int i = 0; i < NoMstPorts; i++) begin + tie_off_trans_complete_d[i] = tie_off_trans_complete_q[i] && meta_i[i].trans_complete; // Feed metadata through directly burst_req_o[i] = burst_req_i; // Feed through the address bits