From c4dcfc88e031511bd063088364047e5468dd727c Mon Sep 17 00:00:00 2001
From: Beeman Strong <97133824+bcstrongx@users.noreply.github.com>
Date: Tue, 7 Jan 2025 14:02:48 -0800
Subject: [PATCH] fix issue with CTR cycle counter decode algorithm (#1787)

---
 src/smctr.adoc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/smctr.adoc b/src/smctr.adoc
index 3c9fe7e76..a8c10e919 100644
--- a/src/smctr.adoc
+++ b/src/smctr.adoc
@@ -626,7 +626,7 @@ _If implementation of any transfer type filter bit results in reduced software p
 
 The `ctrdata` register may optionally include a count of CPU cycles elapsed since the prior CTR record.  The elapsed cycle count value is represented by the CC field, which has a 12-bit mantissa component (Cycle Count Mantissa, or CCM) and a 4-bit exponent component (Cycle Count Exponent, or CCE). 
 
-The elapsed cycle counter (CtrCycleCounter) increments at the same rate as the `mcycle` counter.  Only cycles while CTR is active are counted, where active implies that the current privilege mode is enabled for recording and CTR is not frozen.  The CC field is encoded such that CCE holds 0 if the CtrCycleCounter value is less than 4096, otherwise it holds the index of the most significant one bit in the CtrCycleCounter value, minus 12.  CCM holds CtrCycleCounter bits CCE+11:CCE.
+The elapsed cycle counter (CtrCycleCounter) increments at the same rate as the `mcycle` counter.  Only cycles while CTR is active are counted, where active implies that the current privilege mode is enabled for recording and CTR is not frozen.  The CC field is encoded such that CCE holds 0 if the CtrCycleCounter value is less than 4096, otherwise it holds the index of the most significant one bit in the CtrCycleCounter value, minus 11.  CCM holds CtrCycleCounter bits CCE+10:CCE-1.
 
 The elapsed cycle count can then be calculated by software using the following formula: