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Merge pull request tock#4173 from alevy/spi/trd/leasable-buffer
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Switch SPI master HIL to leasable buffers instead of raw slices
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@alevy
alevy authored Sep 24, 2024
2 parents 306620f + 0a84fa0 commit fe99a8a
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Showing 26 changed files with 769 additions and 616 deletions.
31 changes: 14 additions & 17 deletions boards/apollo3/lora_things_plus/src/tests/spi_controller.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,23 +9,24 @@ use core::cell::Cell;
use kernel::hil::spi::{self, ClockPhase, ClockPolarity};
use kernel::hil::spi::{SpiMaster, SpiMasterClient};
use kernel::static_init;
use kernel::utilities::cells::TakeCell;
use kernel::utilities::cells::MapCell;
use kernel::utilities::leasable_buffer::SubSliceMut;
use kernel::{debug, ErrorCode};

struct SpiHostCallback {
transfer_done: Cell<bool>,
tx_len: Cell<usize>,
tx_data: TakeCell<'static, [u8]>,
rx_data: TakeCell<'static, [u8]>,
tx_data: MapCell<SubSliceMut<'static, u8>>,
rx_data: MapCell<SubSliceMut<'static, u8>>,
}

impl<'a> SpiHostCallback {
fn new(tx_data: &'static mut [u8], rx_data: &'static mut [u8]) -> Self {
SpiHostCallback {
transfer_done: Cell::new(false),
tx_len: Cell::new(0),
tx_data: TakeCell::new(tx_data),
rx_data: TakeCell::new(rx_data),
tx_data: MapCell::new(tx_data.into()),
rx_data: MapCell::new(rx_data.into()),
}
}

Expand All @@ -38,14 +39,12 @@ impl<'a> SpiHostCallback {
impl<'a> SpiMasterClient for SpiHostCallback {
fn read_write_done(
&self,
tx_data: &'static mut [u8],
rx_done: Option<&'static mut [u8]>,
tx_len: usize,
rc: Result<(), ErrorCode>,
tx_data: SubSliceMut<'static, u8>,
rx_done: Option<SubSliceMut<'static, u8>>,
rc: Result<usize, ErrorCode>,
) {
// Transfer Complete
assert_eq!(rc, Ok(()));
assert_eq!(tx_len, self.tx_len.get());
assert_eq!(rc, Ok(self.tx_len.get()));

// Capture Buffers
match rx_done {
Expand All @@ -59,9 +58,7 @@ impl<'a> SpiMasterClient for SpiHostCallback {

self.tx_data.replace(tx_data);

if self.tx_len.get() == tx_len {
self.transfer_done.set(true);
}
self.transfer_done.set(true);
}
}

Expand Down Expand Up @@ -159,7 +156,7 @@ fn spi_host_transfer_partial() {
spi_host.set_phase(ClockPhase::SampleLeading).ok();

assert_eq!(
spi_host.read_write_bytes(tx, Some(rx), cb.tx_len.get()),
spi_host.read_write_bytes(tx.into(), Some(rx.into())),
Ok(())
);
run_kernel_op(5000);
Expand Down Expand Up @@ -197,7 +194,7 @@ fn spi_host_transfer_single() {
spi_host.set_phase(ClockPhase::SampleLeading).ok();

assert_eq!(
spi_host.read_write_bytes(tx, Some(rx), cb.tx_len.get()),
spi_host.read_write_bytes(tx.into(), Some(rx.into())),
Ok(())
);
run_kernel_op(5000);
Expand All @@ -218,7 +215,7 @@ fn spi_host_transfer_single() {
cb.tx_len.set(tx2.len());

assert_eq!(
spi_host.read_write_bytes(tx2, Some(rx2), cb.tx_len.get()),
spi_host.read_write_bytes(tx2.into(), Some(rx2.into())),
Ok(())
);
run_kernel_op(5000);
Expand Down
40 changes: 14 additions & 26 deletions boards/apollo3/redboard_artemis_nano/src/tests/spi_controller.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,23 +9,24 @@ use core::cell::Cell;
use kernel::hil::spi::{self, ClockPhase, ClockPolarity};
use kernel::hil::spi::{SpiMaster, SpiMasterClient};
use kernel::static_init;
use kernel::utilities::cells::TakeCell;
use kernel::utilities::cells::MapCell;
use kernel::utilities::leasable_buffer::SubSliceMut;
use kernel::{debug, ErrorCode};

struct SpiHostCallback {
transfer_done: Cell<bool>,
tx_len: Cell<usize>,
tx_data: TakeCell<'static, [u8]>,
rx_data: TakeCell<'static, [u8]>,
tx_data: MapCell<SubSliceMut<'static, u8>>,
rx_data: MapCell<SubSliceMut<'static, u8>>,
}

impl<'a> SpiHostCallback {
fn new(tx_data: &'static mut [u8], rx_data: &'static mut [u8]) -> Self {
SpiHostCallback {
transfer_done: Cell::new(false),
tx_len: Cell::new(0),
tx_data: TakeCell::new(tx_data),
rx_data: TakeCell::new(rx_data),
tx_data: MapCell::new(tx_data.into()),
rx_data: MapCell::new(rx_data.into()),
}
}

Expand All @@ -38,14 +39,12 @@ impl<'a> SpiHostCallback {
impl<'a> SpiMasterClient for SpiHostCallback {
fn read_write_done(
&self,
tx_data: &'static mut [u8],
rx_done: Option<&'static mut [u8]>,
tx_len: usize,
rc: Result<(), ErrorCode>,
tx_data: SubSliceMut<'static, u8>,
rx_done: Option<SubSliceMut<'static, u8>>,
rc: Result<usize, ErrorCode>,
) {
// Transfer Complete
assert_eq!(rc, Ok(()));
assert_eq!(tx_len, self.tx_len.get());
assert_eq!(rc, Ok(self.tx_len.get()));

// Capture Buffers
match rx_done {
Expand All @@ -59,9 +58,7 @@ impl<'a> SpiMasterClient for SpiHostCallback {

self.tx_data.replace(tx_data);

if self.tx_len.get() == tx_len {
self.transfer_done.set(true);
}
self.transfer_done.set(true);
}
}

Expand Down Expand Up @@ -158,10 +155,7 @@ fn spi_host_transfer_partial() {
spi_host.set_polarity(ClockPolarity::IdleLow).ok();
spi_host.set_phase(ClockPhase::SampleLeading).ok();

assert_eq!(
spi_host.read_write_bytes(tx, Some(rx), cb.tx_len.get()),
Ok(())
);
assert_eq!(spi_host.read_write_bytes(tx, Some(rx)), Ok(()));
run_kernel_op(5000);

assert_eq!(cb.transfer_done.get(), true);
Expand Down Expand Up @@ -196,10 +190,7 @@ fn spi_host_transfer_single() {
spi_host.set_polarity(ClockPolarity::IdleLow).ok();
spi_host.set_phase(ClockPhase::SampleLeading).ok();

assert_eq!(
spi_host.read_write_bytes(tx, Some(rx), cb.tx_len.get()),
Ok(())
);
assert_eq!(spi_host.read_write_bytes(tx, Some(rx)), Ok(()));
run_kernel_op(5000);

assert_eq!(cb.transfer_done.get(), true);
Expand All @@ -217,10 +208,7 @@ fn spi_host_transfer_single() {
let rx2 = cb.rx_data.take().unwrap();
cb.tx_len.set(tx2.len());

assert_eq!(
spi_host.read_write_bytes(tx2, Some(rx2), cb.tx_len.get()),
Ok(())
);
assert_eq!(spi_host.read_write_bytes(tx2, Some(rx2)), Ok(()));
run_kernel_op(5000);

assert_eq!(cb.transfer_done.get(), true);
Expand Down
15 changes: 7 additions & 8 deletions boards/imix/src/test/spi_dummy.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@ use core::ptr::addr_of_mut;

use kernel::hil::gpio::Configure;
use kernel::hil::spi::{self, SpiMaster};
use kernel::utilities::leasable_buffer::SubSliceMut;
use kernel::ErrorCode;

#[allow(unused_variables, dead_code)]
Expand All @@ -31,17 +32,16 @@ impl spi::SpiMasterClient for DummyCB {
#[allow(unused_variables, dead_code)]
fn read_write_done(
&self,
write: &'static mut [u8],
read: Option<&'static mut [u8]>,
len: usize,
_status: Result<(), ErrorCode>,
write: SubSliceMut<'static, u8>,
read: Option<SubSliceMut<'static, u8>>,
status: Result<usize, ErrorCode>,
) {
unsafe {
// do actual stuff
// TODO verify SPI return value
let _ = self
.spi
.read_write_bytes(&mut *addr_of_mut!(A5), None, A5.len());
.read_write_bytes((&mut *addr_of_mut!(A5) as &mut [u8]).into(), None);

// FLOP = !FLOP;
// let len: usize = BUF1.len();
Expand Down Expand Up @@ -89,9 +89,8 @@ pub unsafe fn spi_dummy_test(spi: &'static sam4l::spi::SpiHw<'static>) {

let len = BUF2.len();
if spi.read_write_bytes(
&mut *addr_of_mut!(BUF2),
Some(&mut *addr_of_mut!(BUF1)),
len,
(&mut *addr_of_mut!(BUF2) as &mut [u8]).into(),
Some((&mut *addr_of_mut!(BUF1) as &mut [u8]).into()),
) != Ok(())
{
loop {
Expand Down
27 changes: 12 additions & 15 deletions boards/imix/src/test/spi_loopback.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -21,6 +21,7 @@ use core::ptr::addr_of_mut;
use kernel::component::Component;
use kernel::debug;
use kernel::hil::spi::{self, SpiMasterDevice};
use kernel::utilities::leasable_buffer::SubSliceMut;
use kernel::ErrorCode;

#[allow(unused_variables, dead_code)]
Expand Down Expand Up @@ -49,14 +50,13 @@ impl spi::SpiMasterClient for SpiLoopback {
#[allow(unused_variables, dead_code)]
fn read_write_done(
&self,
write: &'static mut [u8],
read: Option<&'static mut [u8]>,
len: usize,
status: Result<(), ErrorCode>,
mut write: SubSliceMut<'static, u8>,
read: Option<SubSliceMut<'static, u8>>,
status: Result<usize, ErrorCode>,
) {
let mut good = true;
let read = read.unwrap();
for (c, v) in write.iter().enumerate() {
for (c, v) in write[..].iter().enumerate() {
if read[c] != *v {
debug!(
"SPI test error at index {}: wrote {} but read {}",
Expand All @@ -75,7 +75,7 @@ impl spi::SpiMasterClient for SpiLoopback {
write[i] = counter.wrapping_add(i as u8);
}

if let Err((e, _, _)) = self.spi.read_write_bytes(write, Some(read), len) {
if let Err((e, _, _)) = self.spi.read_write_bytes(write, Some(read)) {
panic!(
"Could not continue SPI test, error on read_write_bytes is {:?}",
e
Expand All @@ -98,9 +98,8 @@ pub unsafe fn spi_loopback_test(

let len = WBUF.len();
if let Err((e, _, _)) = spi.read_write_bytes(
&mut *addr_of_mut!(WBUF),
Some(&mut *addr_of_mut!(RBUF)),
len,
(&mut *addr_of_mut!(WBUF) as &mut [u8]).into(),
Some((&mut *addr_of_mut!(RBUF) as &mut [u8]).into()),
) {
panic!(
"Could not start SPI test, error on read_write_bytes is {:?}",
Expand Down Expand Up @@ -130,9 +129,8 @@ pub unsafe fn spi_two_loopback_test(mux: &'static MuxSpiMaster<'static, sam4l::s

let len = WBUF.len();
if let Err((e, _, _)) = spi_fast.read_write_bytes(
&mut *addr_of_mut!(WBUF),
Some(&mut *addr_of_mut!(RBUF)),
len,
(&mut *addr_of_mut!(WBUF) as &mut [u8]).into(),
Some((&mut *addr_of_mut!(RBUF) as &mut [u8]).into()),
) {
panic!(
"Could not start SPI test, error on read_write_bytes is {:?}",
Expand All @@ -142,9 +140,8 @@ pub unsafe fn spi_two_loopback_test(mux: &'static MuxSpiMaster<'static, sam4l::s

let len = WBUF2.len();
if let Err((e, _, _)) = spi_slow.read_write_bytes(
&mut *addr_of_mut!(WBUF2),
Some(&mut *addr_of_mut!(RBUF2)),
len,
(&mut *addr_of_mut!(WBUF2) as &mut [u8]).into(),
Some((&mut *addr_of_mut!(RBUF2) as &mut [u8]).into()),
) {
panic!(
"Could not start SPI test, error on read_write_bytes is {:?}",
Expand Down
36 changes: 14 additions & 22 deletions boards/opentitan/src/tests/spi_host.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,23 +9,24 @@ use core::cell::Cell;
use kernel::hil::spi::{ClockPhase, ClockPolarity};
use kernel::hil::spi::{SpiMaster, SpiMasterClient};
use kernel::static_init;
use kernel::utilities::cells::TakeCell;
use kernel::utilities::cells::MapCell;
use kernel::utilities::leasable_buffer::SubSliceMut;
use kernel::{debug, ErrorCode};

struct SpiHostCallback {
transfer_done: Cell<bool>,
tx_len: Cell<usize>,
tx_data: TakeCell<'static, [u8]>,
rx_data: TakeCell<'static, [u8]>,
tx_data: MapCell<SubSliceMut<'static, u8>>,
rx_data: MapCell<SubSliceMut<'static, u8>>,
}

impl<'a> SpiHostCallback {
fn new(tx_data: &'static mut [u8], rx_data: &'static mut [u8]) -> Self {
SpiHostCallback {
transfer_done: Cell::new(false),
tx_len: Cell::new(0),
tx_data: TakeCell::new(tx_data),
rx_data: TakeCell::new(rx_data),
tx_data: MapCell::new(tx_data.into()),
rx_data: MapCell::new(rx_data.into()),
}
}

Expand All @@ -38,13 +39,13 @@ impl<'a> SpiHostCallback {
impl<'a> SpiMasterClient for SpiHostCallback {
fn read_write_done(
&self,
tx_data: &'static mut [u8],
rx_done: Option<&'static mut [u8]>,
tx_len: usize,
rc: Result<(), ErrorCode>,
tx_data: SubSliceMut<'static, u8>,
rx_done: Option<SubSliceMut<'static, u8>>,
rc: Result<usize, ErrorCode>,
) {
//Transfer Complete
assert_eq!(rc, Ok(()));
assert!(rc.is_ok());
let tx_len = rc.unwrap();
assert_eq!(tx_len, self.tx_len.get());

//Capture Buffers
Expand Down Expand Up @@ -154,10 +155,7 @@ fn spi_host_transfer_partial() {
spi_host.set_polarity(ClockPolarity::IdleLow).ok();
spi_host.set_phase(ClockPhase::SampleLeading).ok();

assert_eq!(
spi_host.read_write_bytes(tx, Some(rx), cb.tx_len.get()),
Ok(())
);
assert_eq!(spi_host.read_write_bytes(tx, Some(rx)), Ok(()));
run_kernel_op(5000);

assert_eq!(cb.transfer_done.get(), true);
Expand Down Expand Up @@ -192,10 +190,7 @@ fn spi_host_transfer_single() {
spi_host.set_polarity(ClockPolarity::IdleLow).ok();
spi_host.set_phase(ClockPhase::SampleLeading).ok();

assert_eq!(
spi_host.read_write_bytes(tx, Some(rx), cb.tx_len.get()),
Ok(())
);
assert_eq!(spi_host.read_write_bytes(tx, Some(rx)), Ok(()));
run_kernel_op(5000);

assert_eq!(cb.transfer_done.get(), true);
Expand All @@ -213,10 +208,7 @@ fn spi_host_transfer_single() {
let rx2 = cb.rx_data.take().unwrap();
cb.tx_len.set(tx2.len());

assert_eq!(
spi_host.read_write_bytes(tx2, Some(rx2), cb.tx_len.get()),
Ok(())
);
assert_eq!(spi_host.read_write_bytes(tx2, Some(rx2)), Ok(()));
run_kernel_op(5000);

assert_eq!(cb.transfer_done.get(), true);
Expand Down
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