rsbddisasm: Update bindings

bitdefender · Jul 21, 2023 · 727c87e · 727c87e
1 parent f53cbc5
commit 727c87e
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Showing 11 changed files with 3,783 additions and 3,723 deletions.
diff --git a/bindings/rsbddisasm/bddisasm-sys/Cargo.toml b/bindings/rsbddisasm/bddisasm-sys/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "bddisasm-sys"
-version = "0.3.0"
+version = "0.4.0"
 authors = ["Cristi Anichitei <ianichitei@bitdefender.com>"]
 edition = "2018"
 links = "bddisasm"

diff --git a/bindings/rsbddisasm/bddisasm/CHANGELOG.md b/bindings/rsbddisasm/bddisasm/CHANGELOG.md
@@ -1,5 +1,15 @@
 # bddisasm changelog
 
+## 0.3.1
+
+### Added
+
+- support for new Intel ISA, per Intel Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE.
+
+### Changed
+
+- `Mnemonic`, `IsaSet`, and `Category` use all caps for the enum variants
+
 ## 0.3.0
 
 ### Fixed

diff --git a/bindings/rsbddisasm/bddisasm/Cargo.toml b/bindings/rsbddisasm/bddisasm/Cargo.toml
@@ -14,7 +14,7 @@ categories = ["api-bindings", "hardware-support"]
 keywords = ["disassembler", "decoder", "x86", "amd64", "x86_64"]
 
 [dependencies]
-bddisasm-sys = { version = "0.3.0", path = "../bddisasm-sys" }
+bddisasm-sys = { version = "0.4.0", path = "../bddisasm-sys" }
 
 [features]
 std = []

diff --git a/bindings/rsbddisasm/bddisasm/README.md b/bindings/rsbddisasm/bddisasm/README.md
@@ -34,7 +34,7 @@ use bddisasm::{DecodedInstruction, DecodeMode, Mnemonic};
 let code = vec![0x31, 0xc0];
 match DecodedInstruction::decode(&code, DecodeMode::Bits32) {
     Ok(ins) => {
-        assert_eq!(ins.mnemonic(), Mnemonic::Xor);
+        assert_eq!(ins.mnemonic(), Mnemonic::XOR);
         println!("{}", ins);
     },
     Err(err) => println!("Unable to decode: {}", err),

diff --git a/bindings/rsbddisasm/bddisasm/examples/emulator.rs b/bindings/rsbddisasm/bddisasm/examples/emulator.rs
@@ -26,14 +26,14 @@ impl Context {
         let operands = ins.operands();
 
         match ins.mnemonic() {
-            Mnemonic::Mov => {
+            Mnemonic::MOV => {
                 self.set_operand_value(&operands[0], self.get_operand_value(&operands[1])?)?
             }
-            Mnemonic::Inc => self.set_operand_value(
+            Mnemonic::INC => self.set_operand_value(
                 &operands[0],
                 self.get_operand_value(&operands[0])?.wrapping_add(1),
             )?,
-            Mnemonic::Dec => self.set_operand_value(
+            Mnemonic::DEC => self.set_operand_value(
                 &operands[0],
                 self.get_operand_value(&operands[0])?.wrapping_sub(1),
             )?,

diff --git a/bindings/rsbddisasm/bddisasm/src/decoded_instruction.rs b/bindings/rsbddisasm/bddisasm/src/decoded_instruction.rs
@@ -598,13 +598,13 @@ impl DecodedInstruction {
     ///
     /// let ins =
     ///     DecodedInstruction::decode(&[0x50], DecodeMode::Bits64)?;
-    /// assert_eq!(ins.mnemonic(), Mnemonic::Push);
+    /// assert_eq!(ins.mnemonic(), Mnemonic::PUSH);
     /// assert_eq!(ins.op_mode(), OperandSize::OpSize32);
     /// assert_eq!(ins.effective_op_mode(), OperandSize::OpSize64);
     ///
     /// let ins =
     ///     DecodedInstruction::decode(&[0x48, 0x50], DecodeMode::Bits64)?;
-    /// assert_eq!(ins.mnemonic(), Mnemonic::Push);
+    /// assert_eq!(ins.mnemonic(), Mnemonic::PUSH);
     /// assert_eq!(ins.op_mode(), OperandSize::OpSize64);
     /// assert_eq!(ins.effective_op_mode(), OperandSize::OpSize64);
     /// # Ok(())
@@ -1237,7 +1237,7 @@ impl DecodedInstruction {
         }
     }
 
-    /// Get the second immediate. Used mainly for [`Mnemonic::Enter`](Mnemonic::Enter).
+    /// Get the second immediate. Used mainly for [`Mnemonic::ENTER`](Mnemonic::ENTER).
     #[inline]
     pub fn immediate2(&self) -> Option<u8> {
         if self.has_imm2() {
@@ -1550,7 +1550,7 @@ mod tests {
     fn decode() {
         let code = vec![0xb8, 0x00, 0x00, 0x00, 0x00];
         let ins = DecodedInstruction::decode(&code, DecodeMode::Bits32).expect("Unable to decode");
-        assert_eq!(ins.instruction, Mnemonic::Mov);
+        assert_eq!(ins.instruction, Mnemonic::MOV);
         assert_eq!(ins.bytes(), code);
         assert_eq!(format!("{}", ins), "MOV       eax, 0x00000000");
     }
@@ -1560,7 +1560,7 @@ mod tests {
         let code = b"\x48\x8b\x05\xf9\xff\xff\xff";
         let ins = DecodedInstruction::decode_with_ip(code, DecodeMode::Bits64, 0x100)
             .expect("Unable to decode");
-        assert_eq!(ins.instruction, Mnemonic::Mov);
+        assert_eq!(ins.instruction, Mnemonic::MOV);
         assert_eq!(ins.bytes(), code);
         assert_eq!(format!("{}", ins), "MOV       rax, qword ptr [rel 0x100]");
     }

diff --git a/bindings/rsbddisasm/bddisasm/src/decoder.rs b/bindings/rsbddisasm/bddisasm/src/decoder.rs
@@ -223,11 +223,11 @@ mod tests {
         let mut decoder = Decoder::new(&code, DecodeMode::Bits64, 0x1000);
         let expected: Vec<Result<(Mnemonic, &str, &[u8]), DecodeError>> = vec![
             Ok((
-                Mnemonic::Mov,
+                Mnemonic::MOV,
                 "MOV       eax, 0x00000000",
                 &[0xb8, 0x00, 0x00, 0x00, 0x00],
             )),
-            Ok((Mnemonic::Mov, "MOV       rdi, rcx", &[0x48, 0x8b, 0xf9])),
+            Ok((Mnemonic::MOV, "MOV       rdi, rcx", &[0x48, 0x8b, 0xf9])),
             Err(DecodeError::InvalidEncoding),
             Err(DecodeError::BufferTooSmall),
         ];
@@ -255,11 +255,11 @@ mod tests {
         let decoder = Decoder::new(&code, DecodeMode::Bits64, 0x1000);
         let expected: Vec<Result<(Mnemonic, &str, &[u8]), DecodeError>> = vec![
             Ok((
-                Mnemonic::Mov,
+                Mnemonic::MOV,
                 "MOV       eax, 0x00000000",
                 &[0xb8, 0x00, 0x00, 0x00, 0x00],
             )),
-            Ok((Mnemonic::Mov, "MOV       rdi, rcx", &[0x48, 0x8b, 0xf9])),
+            Ok((Mnemonic::MOV, "MOV       rdi, rcx", &[0x48, 0x8b, 0xf9])),
             Err(DecodeError::InvalidEncoding),
             Err(DecodeError::BufferTooSmall),
         ];