Add support for building on Windows and specifying custom boards (#72)

* Add support for building on Windows and specifying custom boards

Adjusted paths so that building will work on windows/powershell. Also changed default ncs version to 2.6.1 and fixed zigbee with changes related to it.
We're also setting BOARD_ROOT to workdir so that one can use custom board definitions

* Fix some more path issues on windows

* Add custom board example

* Update config/device.go

Co-authored-by: Yevhen Sylenko <1863154+ffenix113@users.noreply.github.com>

* Fixed more paths in ncs_finder.go and make extendEnv more robust

* remove unnecessary logic

---------

Co-authored-by: Yevhen Sylenko <1863154+ffenix113@users.noreply.github.com>

cmd/zigbee/firmware/build.go

@@ -51,6 +51,7 @@ func buildFirmware(ctx *cli.Context) error {
 	if workDir == "" {
 		workDir = "."
 	}
+	workDir = filepath.ToSlash(workDir) // This will make sure that workdir uses slashes as path separators even on windows, which will be fine for cmake.
 
 	generator, err := generate.NewGenerator(cfg)
 	if err != nil {

config/device.go

@@ -5,6 +5,7 @@ import (
 	"io"
 	"log"
 	"os"
+	"runtime"
 	"slices"
 	"strings"
 	"time"
@@ -60,11 +61,16 @@ type Board struct {
 func ParseFromFile(configPath string) (*Device, error) {
 	cfg := &Device{
 		General: General{
-			RunEvery:         time.Minute,
-			NCSToolChainBase: "~/ncs",
-			NCSVersion:       "v2.5.0",
-			Manufacturer:     "FFexix113",
-			DeviceName:       "dongle",
+			RunEvery: time.Minute,
+			NCSToolChainBase: func() string {
+				if runtime.GOOS == "windows" {
+					return "C:\\ncs"
+				}
+				return "~/ncs"
+			}(),
+			NCSVersion:   "v2.6.1",
+			Manufacturer: "FFexix113",
+			DeviceName:   "dongle",
 		},
 	}
 
@@ -94,6 +100,7 @@ func ParseFromReader(defConfig *Device, rdr io.Reader) (*Device, error) {
 	// This may contain environment variables,
 	// so be kind and try to resolve
 	defConfig.General.NCSToolChainBase = resolveStringEnv(defConfig.General.NCSToolChainBase)
+
 	defConfig.General.ZephyrBase = resolveStringEnv(defConfig.General.ZephyrBase)
 
 	defConfig.PrependCommonClusters()

config/ncs_finder.go

@@ -6,7 +6,7 @@ import (
 	"fmt"
 	"log"
 	"os"
-	"path"
+	"path/filepath"
 	"regexp"
 	"strconv"
 
@@ -161,11 +161,11 @@ func selectVersion(requested string, available []string) string {
 func constructPaths(ncsBase, version, bundleID string) NCSLocation {
 	return NCSLocation{
 		Version: version,
-		NCS:     path.Join(ncsBase, "toolchains", bundleID),
-		Zephyr:  path.Join(ncsBase, version, "zephyr"),
+		NCS:     filepath.Join(ncsBase, "toolchains", bundleID),
+		Zephyr:  filepath.Join(ncsBase, version, "zephyr"),
 	}
 }
 
 func toolchainConfigPath(ncsBase string) string {
-	return path.Join(ncsBase, "toolchains", "toolchains.json")
+	return filepath.Join(ncsBase, "toolchains", "toolchains.json")
 }

examples/custom_board/boards/arm/nice_nano/Kconfig

@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: MIT
+
+config BOARD_ENABLE_DCDC
+    bool "Enable DCDC mode"
+    select SOC_DCDC_NRF52X
+    default y
+    depends on (BOARD_NICE_NANO || BOARD_NICE_NANO_V2)
+
+config BOARD_ENABLE_DCDC_HV
+    bool "High voltage DCDC converter"
+    select SOC_DCDC_NRF52X_HV
+    default y
+    depends on (BOARD_NICE_NANO_V2)

examples/custom_board/boards/arm/nice_nano/Kconfig.board

@@ -0,0 +1,13 @@
+# nice!nano board configuration
+
+# Copyright (c) 2020 Pete Johanson
+# SPDX-License-Identifier: MIT
+
+config BOARD_NICE_NANO
+    bool "nice!nano"
+    depends on SOC_NRF52840_QIAA
+
+config BOARD_NICE_NANO_V2
+    bool "nice!nano v2"
+    depends on SOC_NRF52840_QIAA
+

examples/custom_board/boards/arm/nice_nano/Kconfig.defconfig

@@ -0,0 +1,19 @@
+# Copyright (c) 2021 The ZMK Contributors
+# SPDX-License-Identifier: MIT
+
+if BOARD_NICE_NANO || BOARD_NICE_NANO_V2
+
+config BOARD
+    default "nice_nano"
+
+if USB_DEVICE_STACK
+
+config USB_NRFX
+    default y
+
+endif # USB_DEVICE_STACK
+
+config BT_CTLR
+    default BT
+
+endif # BOARD_NICE_NANO || BOARD_NICE_NANO_V2

examples/custom_board/boards/arm/nice_nano/arduino_pro_micro_pins.dtsi

@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2020 Pete Johanson
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+/ {
+    pro_micro: connector {
+        compatible = "arduino-pro-micro";
+        #gpio-cells = <2>;
+        gpio-map-mask = <0xffffffff 0xffffffc0>;
+        gpio-map-pass-thru = <0 0x3f>;
+        gpio-map
+            = <0 0 &gpio0 8 0>      /* D0 */
+            , <1 0 &gpio0 6 0>      /* D1 */
+            , <2 0 &gpio0 17 0>     /* D2 */
+            , <3 0 &gpio0 20 0>     /* D3 */
+            , <4 0 &gpio0 22 0>     /* D4/A6 */
+            , <5 0 &gpio0 24 0>     /* D5 */
+            , <6 0 &gpio1 0 0>      /* D6/A7 */
+            , <7 0 &gpio0 11 0>     /* D7 */
+            , <8 0 &gpio1 4 0>      /* D8/A8 */
+            , <9 0 &gpio1 6 0>      /* D9/A9 */
+            , <10 0 &gpio0 9 0>     /* D10/A10 */
+            , <16 0 &gpio0 10 0>    /* D16 */
+            , <14 0 &gpio1 11 0>    /* D14 */
+            , <15 0 &gpio1 13 0>    /* D15 */
+            , <18 0 &gpio1 15 0>    /* D18/A0 */
+            , <19 0 &gpio0 2 0> /* D19/A1 */
+            , <20 0 &gpio0 29 0>    /* D20/A2 */
+            , <21 0 &gpio0 31 0>    /* D21/A3 */
+            ;
+    };
+
+    pro_micro_a: connector_a {
+        compatible = "arduino-pro-micro";
+        #gpio-cells = <2>;
+        gpio-map-mask = <0xffffffff 0xffffffc0>;
+        gpio-map-pass-thru = <0 0x3f>;
+        gpio-map
+            = <0 0 &gpio1 15 0> /* D18/A0 */
+            , <1 0 &gpio0 2 0>  /* D19/A1 */
+            , <2 0 &gpio0 29 0> /* D20/A2 */
+            , <3 0 &gpio0 31 0> /* D21/A3 */
+            , <6 0 &gpio0 22 0> /* D4/A6 */
+            , <7 0 &gpio1 0 0>  /* D6/A7 */
+            , <8 0 &gpio1 4 0>  /* D8/A8 */
+            , <9 0 &gpio1 6 0>  /* D9/A9 */
+            , <10 0 &gpio0 9 0> /* D10/A10 */
+            ;
+    };
+};
+
+pro_micro_d: &pro_micro {};
+pro_micro_i2c: &i2c0 {};
+pro_micro_spi: &spi1 {};
+pro_micro_serial: &uart0 {};

examples/custom_board/boards/arm/nice_nano/board.cmake

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: MIT
+
+board_runner_args(nrfjprog "--nrf-family=NRF52" "--softreset")
+include(${ZEPHYR_BASE}/boards/common/uf2.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)

examples/custom_board/boards/arm/nice_nano/nice_nano-pinctrl.dtsi

@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2022 The ZMK Contributors
+ * SPDX-License-Identifier: MIT
+ */
+
+&pinctrl {
+    uart0_default: uart0_default {
+        group1 {
+            psels = <NRF_PSEL(UART_RX, 0, 8)>;
+            bias-pull-up;
+        };
+        group2 {
+            psels = <NRF_PSEL(UART_TX, 0, 6)>;
+        };
+    };
+
+    uart0_sleep: uart0_sleep {
+        group1 {
+            psels = <NRF_PSEL(UART_RX, 0, 8)>,
+                <NRF_PSEL(UART_TX, 0, 6)>;
+            low-power-enable;
+        };
+    };
+
+    i2c0_default: i2c0_default {
+        group1 {
+            psels = <NRF_PSEL(TWIM_SDA, 0, 17)>,
+                <NRF_PSEL(TWIM_SCL, 0, 20)>;
+        };
+    };
+
+    i2c0_sleep: i2c0_sleep {
+        group1 {
+            psels = <NRF_PSEL(TWIM_SDA, 0, 17)>,
+                <NRF_PSEL(TWIM_SCL, 0, 20)>;
+            low-power-enable;
+        };
+    };
+
+    spi1_default: spi1_default {
+        group1 {
+            psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
+                <NRF_PSEL(SPIM_MOSI, 0, 10)>,
+                <NRF_PSEL(SPIM_MISO, 1, 11)>;
+        };
+    };
+
+    spi1_sleep: spi1_sleep {
+        group1 {
+            psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
+                <NRF_PSEL(SPIM_MOSI, 0, 10)>,
+                <NRF_PSEL(SPIM_MISO, 1, 11)>;
+            low-power-enable;
+        };
+    };
+};

examples/custom_board/boards/arm/nice_nano/nice_nano.dts

@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2021 The ZMK Contributors
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+/dts-v1/;
+#include "nice_nano.dtsi"
+
+/ {
+    chosen {
+        zmk,battery = &vbatt;
+    };
+
+    // Node name must match original "EXT_POWER" label to preserve user settings.
+    EXT_POWER {
+        compatible = "zmk,ext-power-generic";
+        control-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+    };
+
+    vbatt: vbatt {
+        compatible = "zmk,battery-voltage-divider";
+        io-channels = <&adc 2>;
+        output-ohms = <2000000>;
+        full-ohms = <(2000000 + 806000)>;
+    };
+};

examples/custom_board/boards/arm/nice_nano/nice_nano.dtsi

@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2021 The ZMK Contributors
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#include <nordic/nrf52840_qiaa.dtsi>
+#include "nice_nano-pinctrl.dtsi"
+#include "arduino_pro_micro_pins.dtsi"
+
+/ {
+    model = "nice!nano";
+    compatible = "nice,nano";
+
+    chosen {
+        zephyr,code-partition = &code_partition;
+        zephyr,sram = &sram0;
+        zephyr,flash = &flash0;
+        zephyr,ieee802154 = &ieee802154;
+    };
+
+    leds {
+        compatible = "gpio-leds";
+        red_led: led_0 {
+            gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
+        };
+    };
+
+    aliases {
+        redled = &red_led;
+    };
+};
+
+&ieee802154 {
+    status = "okay";
+};
+
+
+&adc {
+    status = "okay";
+};
+
+&gpiote {
+    status = "okay";
+};
+
+&gpio0 {
+    status = "okay";
+};
+
+&gpio1 {
+    status = "okay";
+};
+
+&i2c0 {
+    compatible = "nordic,nrf-twi";
+    pinctrl-0 = <&i2c0_default>;
+    pinctrl-1 = <&i2c0_sleep>;
+    pinctrl-names = "default", "sleep";
+};
+
+&spi1 {
+    compatible = "nordic,nrf-spim";
+    pinctrl-0 = <&spi1_default>;
+    pinctrl-1 = <&spi1_sleep>;
+    pinctrl-names = "default", "sleep";
+};
+
+&uart0 {
+    compatible = "nordic,nrf-uarte";
+    current-speed = <115200>;
+    pinctrl-0 = <&uart0_default>;
+    pinctrl-1 = <&uart0_sleep>;
+    pinctrl-names = "default", "sleep";
+};
+
+zephyr_udc0: &usbd {
+    compatible = "nordic,nrf-usbd";
+	status = "okay";
+};
+
+
+&flash0 {
+    /*
+     * For more information, see:
+     * http://docs.zephyrproject.org/latest/devices/dts/flash_partitions.html
+     */
+    partitions {
+        compatible = "fixed-partitions";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        sd_partition: partition@0 {
+            reg = <0x00000000 0x00026000>;
+        };
+        code_partition: partition@26000 {
+            reg = <0x00026000 0x000c6000>;
+        };
+
+        /*
+         * The flash starting at 0x000ec000 and ending at
+         * 0x000f3fff is reserved for use by the application.
+         */
+
+        /*
+         * Storage partition will be used by FCB/LittleFS/NVS
+         * if enabled.
+         */
+        storage_partition: partition@ec000 {
+            reg = <0x000ec000 0x00008000>;
+        };
+
+        boot_partition: partition@f4000 {
+            reg = <0x000f4000 0x0000c000>;
+        };
+    };
+};