Patch SVDs with GPIO5 clock gate

The 1020, 1050, and 1060 SVDs qualify these fields as reserved, so the previous commits scrubbed the fields. Patch the SVDs to re-introduce the field.
imxrt-rs · May 14, 2024 · 0d39161 · 0d39161
1 parent 7a20156
commit 0d39161
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diff --git a/devices/common_patches/ccm_cg_gpio5.yaml b/devices/common_patches/ccm_cg_gpio5.yaml
@@ -0,0 +1,11 @@
+# Clock gate 15 in CCM[CCGR1] is missing from 1050 and 1060 MCUs.
+# It isn't reserved according to the reference manual. This
+# clock gate is for GPIO5.
+CCM:
+  CCGR1:
+    _modify:
+      CG15:
+        description: gpio5 clock (gpio5_clk_enable)
+        bitOffset: 30
+        bitWidth: 2
+        access: read-write
diff --git a/devices/imxrt1021.yaml b/devices/imxrt1021.yaml
@@ -2,6 +2,7 @@ _svd: "../svd/imxrt1021.svd"
 
 _include:
   - "common.yaml"
+  - "common_patches/ccm_cg_gpio5.yaml"
   - "common_patches/pwm1/submodule_cluster.yaml"
   - "common_patches/usb.yaml"
   - "common_patches/dma0/tcd_cluster.yaml"

diff --git a/devices/imxrt1051.yaml b/devices/imxrt1051.yaml
@@ -2,6 +2,7 @@ _svd: "../svd/imxrt1051.svd"
 
 _include:
   - "common.yaml"
+  - "common_patches/ccm_cg_gpio5.yaml"
   - "common_patches/pwm1/submodule_cluster.yaml"
   - "common_patches/usb1.yaml"
   - "common_patches/dma0/tcd_cluster.yaml"

diff --git a/devices/imxrt1052.yaml b/devices/imxrt1052.yaml
@@ -2,6 +2,7 @@ _svd: "../svd/imxrt1052.svd"
 
 _include:
   - "common.yaml"
+  - "common_patches/ccm_cg_gpio5.yaml"
   - "common_patches/pwm1/submodule_cluster.yaml"
   - "common_patches/usb1.yaml"
   - "common_patches/dma0/tcd_cluster.yaml"

diff --git a/devices/imxrt1061.yaml b/devices/imxrt1061.yaml
@@ -2,6 +2,7 @@ _svd: "../svd/imxrt1061.svd"
 
 _include:
   - "common.yaml"
+  - "common_patches/ccm_cg_gpio5.yaml"
   - "common_patches/pwm1/submodule_cluster.yaml"
   - "common_patches/usb1.yaml"
   - "common_patches/dma0/tcd_cluster.yaml"

diff --git a/devices/imxrt1062.yaml b/devices/imxrt1062.yaml
@@ -2,6 +2,7 @@ _svd: "../svd/imxrt1062.svd"
 
 _include:
   - "common.yaml"
+  - "common_patches/ccm_cg_gpio5.yaml"
   - "common_patches/pwm1/submodule_cluster.yaml"
   - "common_patches/usb1.yaml"
   - "common_patches/dma0/tcd_cluster.yaml"

diff --git a/devices/imxrt1064.yaml b/devices/imxrt1064.yaml
@@ -2,6 +2,7 @@ _svd: "../svd/imxrt1064.svd"
 
 _include:
   - "common.yaml"
+  - "common_patches/ccm_cg_gpio5.yaml"
   - "common_patches/pwm1/submodule_cluster.yaml"
   - "common_patches/usb1.yaml"
   - "common_patches/dma0/tcd_cluster.yaml"

diff --git a/src/blocks/imxrt1021/ccm.rs b/src/blocks/imxrt1021/ccm.rs
@@ -2720,6 +2720,14 @@ pub mod CCGR1 {
         pub mod W {}
         pub mod RW {}
     }
+    #[doc = "gpio5 clock (gpio5_clk_enable)"]
+    pub mod CG15 {
+        pub const offset: u32 = 30;
+        pub const mask: u32 = 0x03 << offset;
+        pub mod R {}
+        pub mod W {}
+        pub mod RW {}
+    }
 }
 #[doc = "CCM Clock Gating Register 2"]
 pub mod CCGR2 {

diff --git a/src/blocks/imxrt1051/ccm.rs b/src/blocks/imxrt1051/ccm.rs
@@ -2927,6 +2927,14 @@ pub mod CCGR1 {
         pub mod W {}
         pub mod RW {}
     }
+    #[doc = "gpio5 clock (gpio5_clk_enable)"]
+    pub mod CG15 {
+        pub const offset: u32 = 30;
+        pub const mask: u32 = 0x03 << offset;
+        pub mod R {}
+        pub mod W {}
+        pub mod RW {}
+    }
 }
 #[doc = "CCM Clock Gating Register 2"]
 pub mod CCGR2 {

diff --git a/src/blocks/imxrt1061/ccm.rs b/src/blocks/imxrt1061/ccm.rs
@@ -2968,6 +2968,14 @@ pub mod CCGR1 {
         pub mod W {}
         pub mod RW {}
     }
+    #[doc = "gpio5 clock (gpio5_clk_enable)"]
+    pub mod CG15 {
+        pub const offset: u32 = 30;
+        pub const mask: u32 = 0x03 << offset;
+        pub mod R {}
+        pub mod W {}
+        pub mod RW {}
+    }
 }
 #[doc = "CCM Clock Gating Register 2"]
 pub mod CCGR2 {