deploy: 2f91f0e

concepteve_1_1relative__conditional__expr.html

@@ -147,7 +147,7 @@ <h2 class="groupheader">Examples </h2>
 <div class="ttc" id="aconcepteve_1_1conditional__expr_html"><div class="ttname"><a href="concepteve_1_1conditional__expr.html">eve::conditional_expr</a></div><div class="ttdoc">Specifies that a type is a Conditional Expression.</div><div class="ttdef"><b>Definition:</b> conditional.hpp:27</div></div>
 <div class="ttc" id="aconcepteve_1_1relative__conditional__expr_html"><div class="ttname"><a href="concepteve_1_1relative__conditional__expr.html">eve::relative_conditional_expr</a></div><div class="ttdoc">Specifies that a type is a Conditional Expression using relative mask.</div><div class="ttdef"><b>Definition:</b> conditional.hpp:47</div></div>
 <div class="ttc" id="astructeve_1_1as_html"><div class="ttname"><a href="structeve_1_1as.html">eve::as</a></div><div class="ttdoc">Lightweight type-wrapper.</div><div class="ttdef"><b>Definition:</b> as.hpp:29</div></div>
-<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:67</div></div>
+<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:68</div></div>
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conditional.html

@@ -157,7 +157,7 @@ <h1><a class="anchor" id="autotoc_md112"></a>
 <div class="line">  std::cout &lt;&lt; square_or_diff(v1,v2) &lt;&lt; <span class="stringliteral">&quot;\n&quot;</span>;</div>
 <div class="line">}</div>
 <div class="ttc" id="agroup__core__logical_ga74b9090a23d420d6382270233e66f7ac_html_ga74b9090a23d420d6382270233e66f7ac"><div class="ttname"><a href="group__core__logical_ga74b9090a23d420d6382270233e66f7ac.html#ga74b9090a23d420d6382270233e66f7ac">eve::if_else</a></div><div class="ttdeci">constexpr callable_if_else_ if_else</div><div class="ttdoc">Computes the results of a choice under condition.</div><div class="ttdef"><b>Definition:</b> if_else.hpp:64</div></div>
-<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:67</div></div>
+<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:68</div></div>
 </div><!-- fragment --><p>The <a class="el" href="group__core__logical_ga74b9090a23d420d6382270233e66f7ac.html#ga74b9090a23d420d6382270233e66f7ac" title="Computes the results of a choice under condition.">eve::if_else</a> call explicitly requests we pass:</p><ul>
 <li>the condition, i.e the comparison between <code>a</code> and <code>b</code></li>
 <li>the value to use whenever an element of said condition evaluates to <code>true</code>, here the product of <code>a</code> and <code>b</code></li>

freqscale.html

@@ -162,7 +162,7 @@
 <div class="line">}</div>
 <div class="ttc" id="agroup__algo__traits_ga1b9461ddb4574083563052a1fbe355e3_html_ga1b9461ddb4574083563052a1fbe355e3"><div class="ttname"><a href="group__algo__traits_ga1b9461ddb4574083563052a1fbe355e3.html#ga1b9461ddb4574083563052a1fbe355e3">eve::algo::allow_frequency_scaling</a></div><div class="ttdeci">constexpr auto allow_frequency_scaling</div><div class="ttdoc">You can find more explanations in the 'frequency scaling tutorial'. On intel using 64 byte registers ...</div><div class="ttdef"><b>Definition:</b> traits.hpp:350</div></div>
 <div class="ttc" id="agroup__algos_ga6a7bab42eae17a4a6e32e6dfd6ed4d67_html_ga6a7bab42eae17a4a6e32e6dfd6ed4d67"><div class="ttname"><a href="group__algos_ga6a7bab42eae17a4a6e32e6dfd6ed4d67.html#ga6a7bab42eae17a4a6e32e6dfd6ed4d67">eve::algo::find_if</a></div><div class="ttdeci">constexpr auto find_if</div><div class="ttdoc">SIMD version of std::find_if.</div><div class="ttdef"><b>Definition:</b> find.hpp:130</div></div>
-<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:67</div></div>
+<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:68</div></div>
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group__algo__traits_ga0fabb4acfda0758f53418e007ff346ad.html

@@ -177,8 +177,8 @@ <h2 class="memtitle"><span class="permalink"><a href="#ga0fabb4acfda0758f53418e0
 <div class="line"><span class="preprocessor">#endif  </span><span class="comment">// __SSSE3__</span></div>
 <div class="line"> </div>
 <div class="ttc" id="agroup__algos_gad5165d2d2860b87c94861f62014efe5f_html_gad5165d2d2860b87c94861f62014efe5f"><div class="ttname"><a href="group__algos_gad5165d2d2860b87c94861f62014efe5f.html#gad5165d2d2860b87c94861f62014efe5f">eve::algo::remove_if</a></div><div class="ttdeci">constexpr auto remove_if</div><div class="ttdoc">SIMD version of std::remove_if.</div><div class="ttdef"><b>Definition:</b> remove.hpp:87</div></div>
-<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:67</div></div>
-<div class="ttc" id="astructeve_1_1wide_html_a1d3739186033f12c8fe47755f598b60b"><div class="ttname"><a href="structeve_1_1wide.html#a1d3739186033f12c8fe47755f598b60b">eve::wide::size</a></div><div class="ttdeci">static constexpr size_type size() noexcept</div><div class="ttdoc">Size of the wide in number of lanes.</div><div class="ttdef"><b>Definition:</b> wide.hpp:373</div></div>
+<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:68</div></div>
+<div class="ttc" id="astructeve_1_1wide_html_a1d3739186033f12c8fe47755f598b60b"><div class="ttname"><a href="structeve_1_1wide.html#a1d3739186033f12c8fe47755f598b60b">eve::wide::size</a></div><div class="ttdeci">static constexpr size_type size() noexcept</div><div class="ttdoc">Size of the wide in number of lanes.</div><div class="ttdef"><b>Definition:</b> wide.hpp:374</div></div>
 </div><!-- fragment --><dl class="section see"><dt>See also</dt><dd><a class="el" href="group__algo__traits_gae39c02c8504a76a66ba1b2dd39db4ea1.html#gae39c02c8504a76a66ba1b2dd39db4ea1" title="A trait that tells the algorithm to take an extra type into account when selecting a cardinal....">consider_types</a> if maybe using some extra type is the reason you want to change <a class="el" href="structeve_1_1cardinal.html" title="Computes the cardinal of a given type.">cardinal</a>. </dd></dl>
 
 </div>

group__arch_gad4fc83261295a7fd4ebe7d16c328fd1f.html

@@ -169,7 +169,7 @@ <h4><a class="anchor" id="autotoc_md6"></a>
 <div class="line"><span class="keyword">template</span> &lt;plain_scalar_value T&gt;</div>
 <div class="line"><span class="keyword">using </span>nofs_logical = logical&lt;nofs_wide&lt;T&gt;&gt;;</div>
 <div class="ttc" id="astructeve_1_1fixed_html"><div class="ttname"><a href="structeve_1_1fixed.html">eve::fixed</a></div><div class="ttdoc">SIMD register cardinal type.</div><div class="ttdef"><b>Definition:</b> cardinals.hpp:39</div></div>
-<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:67</div></div>
+<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:68</div></div>
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group__bessel_ga03e7715961e4dfc582616856b697cf89.html

@@ -193,7 +193,7 @@ <h2 class="groupheader">Example </h2>
 <div class="line">   std::cout &lt;&lt; <span class="stringliteral">&quot;-&gt; sph_bessel_y0(wf1)                = &quot;</span> &lt;&lt; <a class="code hl_variable" href="group__bessel_ga03e7715961e4dfc582616856b697cf89.html#ga03e7715961e4dfc582616856b697cf89">eve::sph_bessel_y0</a>(wf1) &lt;&lt; <span class="stringliteral">&quot;\n&quot;</span>;</div>
 <div class="line">}</div>
 <div class="ttc" id="astructeve_1_1ignore__last_html"><div class="ttname"><a href="structeve_1_1ignore__last.html">eve::ignore_last</a></div><div class="ttdoc">Conditional expression ignoring the k last lanes from a eve::simd_value.</div><div class="ttdef"><b>Definition:</b> conditional.hpp:304</div></div>
-<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:67</div></div>
+<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:68</div></div>
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group__bessel_ga0d2106f4e47e7108be8477907a41b014.html

@@ -181,7 +181,7 @@ <h2 class="groupheader">Example </h2>
 <div class="line">   std::cout &lt;&lt; <span class="stringliteral">&quot;-&gt; airy(wf1) = &quot;</span> &lt;&lt; <a class="code hl_variable" href="group__bessel_ga0d2106f4e47e7108be8477907a41b014.html#ga0d2106f4e47e7108be8477907a41b014">eve::airy</a>(wf1) &lt;&lt; <span class="stringliteral">&quot;\n&quot;</span>;</div>
 <div class="line">   std::cout &lt;&lt; <a class="code hl_variable" href="group__bessel_ga0d2106f4e47e7108be8477907a41b014.html#ga0d2106f4e47e7108be8477907a41b014">eve::airy</a>(2.0) &lt;&lt; std::endl;</div>
 <div class="line">}</div>
-<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:67</div></div>
+<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:68</div></div>
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group__bessel_ga0eb275d7e0ea0fb64d93d804239a200c.html

@@ -196,7 +196,7 @@ <h2 class="groupheader">Example </h2>
 <div class="line"> </div>
 <div class="line">}</div>
 <div class="ttc" id="astructeve_1_1ignore__last_html"><div class="ttname"><a href="structeve_1_1ignore__last.html">eve::ignore_last</a></div><div class="ttdoc">Conditional expression ignoring the k last lanes from a eve::simd_value.</div><div class="ttdef"><b>Definition:</b> conditional.hpp:304</div></div>
-<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:67</div></div>
+<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:68</div></div>
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group__bessel_ga1452f844fa7cd5419f3a4f18b22649cf.html

@@ -199,7 +199,7 @@ <h2 class="groupheader">Example </h2>
 <div class="line">   std::cout &lt;&lt; <span class="stringliteral">&quot;-&gt; sph_bessel_yn(n, x)                  = &quot;</span> &lt;&lt; <a class="code hl_variable" href="group__bessel_ga1452f844fa7cd5419f3a4f18b22649cf.html#ga1452f844fa7cd5419f3a4f18b22649cf">eve::sph_bessel_yn</a>(n, x) &lt;&lt; <span class="stringliteral">&quot;\n&quot;</span>;</div>
 <div class="line">}</div>
 <div class="ttc" id="astructeve_1_1ignore__last_html"><div class="ttname"><a href="structeve_1_1ignore__last.html">eve::ignore_last</a></div><div class="ttdoc">Conditional expression ignoring the k last lanes from a eve::simd_value.</div><div class="ttdef"><b>Definition:</b> conditional.hpp:304</div></div>
-<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:67</div></div>
+<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:68</div></div>
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group__bessel_ga40e333409894e1ca14d956fc96a3da34.html

@@ -195,7 +195,7 @@ <h2 class="groupheader">Example </h2>
 <div class="line">   std::cout &lt;&lt; <span class="stringliteral">&quot;-&gt; cyl_bessel_j0(wf1)                = &quot;</span> &lt;&lt; <a class="code hl_variable" href="group__bessel_ga40e333409894e1ca14d956fc96a3da34.html#ga40e333409894e1ca14d956fc96a3da34">eve::cyl_bessel_j0</a>(wf1) &lt;&lt; <span class="stringliteral">&quot;\n&quot;</span>;</div>
 <div class="line">}</div>
 <div class="ttc" id="astructeve_1_1ignore__last_html"><div class="ttname"><a href="structeve_1_1ignore__last.html">eve::ignore_last</a></div><div class="ttdoc">Conditional expression ignoring the k last lanes from a eve::simd_value.</div><div class="ttdef"><b>Definition:</b> conditional.hpp:304</div></div>
-<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:67</div></div>
+<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:68</div></div>
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group__bessel_ga5e2dd2d1f2e62bbee606e3194db9352b.html

@@ -195,7 +195,7 @@ <h2 class="groupheader">Example </h2>
 <div class="line">   std::cout &lt;&lt; <span class="stringliteral">&quot;-&gt; cyl_bessel_k1(wf1)                = &quot;</span> &lt;&lt; <a class="code hl_variable" href="group__bessel_ga5e2dd2d1f2e62bbee606e3194db9352b.html#ga5e2dd2d1f2e62bbee606e3194db9352b">eve::cyl_bessel_k1</a>(wf1) &lt;&lt; <span class="stringliteral">&quot;\n&quot;</span>;</div>
 <div class="line">}</div>
 <div class="ttc" id="astructeve_1_1ignore__last_html"><div class="ttname"><a href="structeve_1_1ignore__last.html">eve::ignore_last</a></div><div class="ttdoc">Conditional expression ignoring the k last lanes from a eve::simd_value.</div><div class="ttdef"><b>Definition:</b> conditional.hpp:304</div></div>
-<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:67</div></div>
+<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:68</div></div>
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group__bessel_ga6fb57817a2e6dda7983cddf2361e0757.html

@@ -193,7 +193,7 @@ <h2 class="groupheader">Example </h2>
 <div class="line">   std::cout &lt;&lt; <span class="stringliteral">&quot;-&gt; sph_bessel_j0(wf1)                = &quot;</span> &lt;&lt; <a class="code hl_variable" href="group__bessel_ga6fb57817a2e6dda7983cddf2361e0757.html#ga6fb57817a2e6dda7983cddf2361e0757">eve::sph_bessel_j0</a>(wf1) &lt;&lt; <span class="stringliteral">&quot;\n&quot;</span>;</div>
 <div class="line">}</div>
 <div class="ttc" id="astructeve_1_1ignore__last_html"><div class="ttname"><a href="structeve_1_1ignore__last.html">eve::ignore_last</a></div><div class="ttdoc">Conditional expression ignoring the k last lanes from a eve::simd_value.</div><div class="ttdef"><b>Definition:</b> conditional.hpp:304</div></div>
-<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:67</div></div>
+<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:68</div></div>
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group__bessel_ga7119c2bf8753b192f0923d185e2ebb4e.html

@@ -200,7 +200,7 @@ <h2 class="groupheader">Example </h2>
 <div class="line">   std::cout &lt;&lt; <span class="stringliteral">&quot;-&gt; sph_bessel_jn(n, x)                  = &quot;</span> &lt;&lt; <a class="code hl_variable" href="group__bessel_ga7119c2bf8753b192f0923d185e2ebb4e.html#ga7119c2bf8753b192f0923d185e2ebb4e">eve::sph_bessel_jn</a>(n, x) &lt;&lt; <span class="stringliteral">&quot;\n&quot;</span>;</div>
 <div class="line">}</div>
 <div class="ttc" id="astructeve_1_1ignore__last_html"><div class="ttname"><a href="structeve_1_1ignore__last.html">eve::ignore_last</a></div><div class="ttdoc">Conditional expression ignoring the k last lanes from a eve::simd_value.</div><div class="ttdef"><b>Definition:</b> conditional.hpp:304</div></div>
-<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:67</div></div>
+<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:68</div></div>
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group__bessel_ga75fe8112cf1f1d8d3bc3c13e796f4fff.html

@@ -195,7 +195,7 @@ <h2 class="groupheader">Example </h2>
 <div class="line">   std::cout &lt;&lt; <span class="stringliteral">&quot;-&gt; cyl_bessel_i1(wf1)                = &quot;</span> &lt;&lt; <a class="code hl_variable" href="group__bessel_ga75fe8112cf1f1d8d3bc3c13e796f4fff.html#ga75fe8112cf1f1d8d3bc3c13e796f4fff">eve::cyl_bessel_i1</a>(wf1) &lt;&lt; <span class="stringliteral">&quot;\n&quot;</span>;</div>
 <div class="line">}</div>
 <div class="ttc" id="astructeve_1_1ignore__last_html"><div class="ttname"><a href="structeve_1_1ignore__last.html">eve::ignore_last</a></div><div class="ttdoc">Conditional expression ignoring the k last lanes from a eve::simd_value.</div><div class="ttdef"><b>Definition:</b> conditional.hpp:304</div></div>
-<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:67</div></div>
+<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:68</div></div>
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group__bessel_ga8d5c8c6360854651827324aff64e9ab9.html

@@ -195,7 +195,7 @@ <h2 class="groupheader">Example </h2>
 <div class="line">   std::cout &lt;&lt; <span class="stringliteral">&quot;-&gt; cyl_bessel_j1(wf1)                = &quot;</span> &lt;&lt; <a class="code hl_variable" href="group__bessel_ga8d5c8c6360854651827324aff64e9ab9.html#ga8d5c8c6360854651827324aff64e9ab9">eve::cyl_bessel_j1</a>(wf1) &lt;&lt; <span class="stringliteral">&quot;\n&quot;</span>;</div>
 <div class="line">}</div>
 <div class="ttc" id="astructeve_1_1ignore__last_html"><div class="ttname"><a href="structeve_1_1ignore__last.html">eve::ignore_last</a></div><div class="ttdoc">Conditional expression ignoring the k last lanes from a eve::simd_value.</div><div class="ttdef"><b>Definition:</b> conditional.hpp:304</div></div>
-<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:67</div></div>
+<div class="ttc" id="astructeve_1_1wide_html"><div class="ttname"><a href="structeve_1_1wide.html">eve::wide</a></div><div class="ttdoc">Wrapper for SIMD registers.</div><div class="ttdef"><b>Definition:</b> wide.hpp:68</div></div>
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