[rtl] Fix zero value in FPGA RF #2224
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We should use `WordZeroVal` instead of `0` for reads from register `x0` in the FPGA register file. This bug was discovered when enabling the `RegFileECC` parameter. When this is enabled, the core performs ECC checks, expecting that `WordZeroVal` is returned for `x0`. Else, we get a major alert. Fixes lowRISC/opentitan#25146 Signed-off-by: Pascal Nasahl <nasahlpa@lowrisc.org>
GregAC
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Nov 18, 2024
nasahlpa
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Dec 2, 2024
This commit manually pulls over lowRISC/ibex#2224 to fix the register file for the FPGA configuration. As we do not want to include other Ibex changes, this is done using a patch file. Signed-off-by: Pascal Nasahl <nasahlpa@lowrisc.org> (commit is original to earlgrey_1.0.0)
luismarques
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Dec 9, 2024
This commit manually pulls over lowRISC/ibex#2224 to fix the register file for the FPGA configuration. As we do not want to include other Ibex changes, this is done using a patch file. Signed-off-by: Pascal Nasahl <nasahlpa@lowrisc.org> (commit is original to earlgrey_1.0.0)
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We should use
WordZeroValinstead of0for reads from registerx0in the FPGA register file.This bug was discovered when enabling the
RegFileECCparameter. When this is enabled, the core performs ECC checks, expecting thatWordZeroValis returned forx0. Else, we get a major alert.Fixes lowRISC/opentitan#25146