[pull] master from linux-sunxi:master #20
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The Allwinner A523 has 128KiB of MCU0 SRAM, which the BootROM will not touch. The BROM will use some memory in SRAM A2, which it also clears upon entering FEL mode, starting from address 0x44000. The lowest allocation seems to be the IRQ stack growing down from 0x45400. So we won't touch any of that memory, but can freely use the full 128KB of the primary SRAM for payloads. This means we won't need to swap any buffers for preserving BROM stacks. We put the SPL thunk code just below 0x44000, to leave as much SRAM for the payload as possible. The rest of the SoC is pretty standard, although the watchdogs are now in separate MMIO frames, not part of some timer block anymore. The secure boot mode will prevent even reading the BootROM, so we can use an address in there to test for the secure boot state. However, even though a simple "smc #0" will return to its caller, the NS bit is still set, so we are still in non-secure state afterwards. So leave this bit out for now until we figure out how to switch to secure state properly. Signed-off-by: Andre Przywara <osp@andrep.de>
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