declare dac_ramp as int16_t

pavel-demin · Jun 30, 2021 · 8f8560d · 8f8560d
1 parent e5c8603
commit 8f8560d
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Showing 4 changed files with 16 additions and 16 deletions.
diff --git a/projects/sdr_transceiver_hpsdr/codec.tcl b/projects/sdr_transceiver_hpsdr/codec.tcl
@@ -76,8 +76,8 @@ cell xilinx.com:ip:blk_mem_gen bram_0 {
   USE_BYTE_WRITE_ENABLE true
   BYTE_SIZE 8
   WRITE_WIDTH_A 32
-  WRITE_DEPTH_A 1024
-  WRITE_WIDTH_B 32
+  WRITE_DEPTH_A 512
+  WRITE_WIDTH_B 16
   ENABLE_A Always_Enabled
   ENABLE_B Always_Enabled
   REGISTER_PORTB_OUTPUT_OF_MEMORY_PRIMITIVES false
@@ -88,15 +88,15 @@ cell pavel-demin:user:axi_bram_writer writer_1 {
   AXI_DATA_WIDTH 32
   AXI_ADDR_WIDTH 32
   BRAM_DATA_WIDTH 32
-  BRAM_ADDR_WIDTH 10
+  BRAM_ADDR_WIDTH 9
 } {
   BRAM_PORTA bram_0/BRAM_PORTA
 }
 
 # Create axis_keyer
 cell pavel-demin:user:axis_keyer keyer_0 {
-  AXIS_TDATA_WIDTH 32
-  BRAM_DATA_WIDTH 32
+  AXIS_TDATA_WIDTH 16
+  BRAM_DATA_WIDTH 16
   BRAM_ADDR_WIDTH 10
 } {
   BRAM_PORTA bram_0/BRAM_PORTB

diff --git a/projects/sdr_transceiver_hpsdr/server/sdr-transceiver-hpsdr.c b/projects/sdr_transceiver_hpsdr/server/sdr-transceiver-hpsdr.c
@@ -409,9 +409,9 @@ int main(int argc, char *argv[])
   pthread_attr_t attr;
   pthread_t thread;
   volatile void *cfg, *sts;
-  volatile int32_t *tx_ramp, *dac_ramp;
+  volatile int32_t *tx_ramp;
   volatile uint16_t *tx_size, *dac_size;
-  volatile int16_t *ps_level;
+  volatile int16_t *ps_level, *dac_ramp;
   volatile uint8_t *rx_sel, *tx_sel;
   float scale, ramp[1024], a[4] = {0.35875, 0.48829, 0.14128, 0.01168};
   uint8_t reply[11] = {0xef, 0xfe, 2, 0, 0, 0, 0, 0, 0, 32, 1};
@@ -682,7 +682,7 @@ int main(int argc, char *argv[])
     scale = 3.2e4 / ramp[size];
     for(i = 0; i <= size; ++i)
     {
-      dac_ramp[i] = (int32_t)floor(ramp[i] * scale + 0.5);
+      dac_ramp[i] = (int16_t)floor(ramp[i] * scale + 0.5);
     }
     *dac_size = size;
 

diff --git a/projects/sdr_transceiver_hpsdr_122_88/codec.tcl b/projects/sdr_transceiver_hpsdr_122_88/codec.tcl
@@ -76,8 +76,8 @@ cell xilinx.com:ip:blk_mem_gen bram_0 {
   USE_BYTE_WRITE_ENABLE true
   BYTE_SIZE 8
   WRITE_WIDTH_A 32
-  WRITE_DEPTH_A 1024
-  WRITE_WIDTH_B 32
+  WRITE_DEPTH_A 512
+  WRITE_WIDTH_B 16
   ENABLE_A Always_Enabled
   ENABLE_B Always_Enabled
   REGISTER_PORTB_OUTPUT_OF_MEMORY_PRIMITIVES false
@@ -88,15 +88,15 @@ cell pavel-demin:user:axi_bram_writer writer_1 {
   AXI_DATA_WIDTH 32
   AXI_ADDR_WIDTH 32
   BRAM_DATA_WIDTH 32
-  BRAM_ADDR_WIDTH 10
+  BRAM_ADDR_WIDTH 9
 } {
   BRAM_PORTA bram_0/BRAM_PORTA
 }
 
 # Create axis_keyer
 cell pavel-demin:user:axis_keyer keyer_0 {
-  AXIS_TDATA_WIDTH 32
-  BRAM_DATA_WIDTH 32
+  AXIS_TDATA_WIDTH 16
+  BRAM_DATA_WIDTH 16
   BRAM_ADDR_WIDTH 10
 } {
   BRAM_PORTA bram_0/BRAM_PORTB

diff --git a/projects/sdr_transceiver_hpsdr_122_88/server/sdr-transceiver-hpsdr.c b/projects/sdr_transceiver_hpsdr_122_88/server/sdr-transceiver-hpsdr.c
@@ -409,9 +409,9 @@ int main(int argc, char *argv[])
   pthread_attr_t attr;
   pthread_t thread;
   volatile void *cfg, *sts;
-  volatile int32_t *tx_ramp, *dac_ramp;
+  volatile int32_t *tx_ramp;
   volatile uint16_t *tx_size, *dac_size;
-  volatile int16_t *ps_level;
+  volatile int16_t *ps_level, *dac_ramp;
   volatile uint8_t *rx_sel, *tx_sel;
   float scale, ramp[1024], a[4] = {0.35875, 0.48829, 0.14128, 0.01168};
   uint8_t reply[11] = {0xef, 0xfe, 2, 0, 0, 0, 0, 0, 0, 32, 1};
@@ -682,7 +682,7 @@ int main(int argc, char *argv[])
     scale = 3.2e4 / ramp[size];
     for(i = 0; i <= size; ++i)
     {
-      dac_ramp[i] = (int32_t)floor(ramp[i] * scale + 0.5);
+      dac_ramp[i] = (int16_t)floor(ramp[i] * scale + 0.5);
     }
     *dac_size = size;