Merge pull request #710 from pavel-demin/develop

add rx and tx selectors to sdr_transceiver_hpsdr

projects/sdr_transceiver_hpsdr/app/start.sh

@@ -6,4 +6,4 @@ source $apps_dir/stop.sh
 
 cat $apps_dir/sdr_transceiver_hpsdr/sdr_transceiver_hpsdr.bit > /dev/xdevcfg
 
-$apps_dir/sdr_transceiver_hpsdr/sdr-transceiver-hpsdr &
+$apps_dir/sdr_transceiver_hpsdr/sdr-transceiver-hpsdr 1 2 2 1 2 &

projects/sdr_transceiver_hpsdr/bazaar/start.sh

@@ -1 +1 @@
-/opt/redpitaya/www/apps/sdr_transceiver_hpsdr/sdr-transceiver-hpsdr &
+/opt/redpitaya/www/apps/sdr_transceiver_hpsdr/sdr-transceiver-hpsdr 1 2 2 1 2 &

projects/sdr_transceiver_hpsdr/block_design.tcl

@@ -218,6 +218,9 @@ module rx_0 {
   slice_3/din cfg_slice_0/dout
   slice_4/din cfg_slice_0/dout
   slice_5/din cfg_slice_0/dout
+  slice_6/din cfg_slice_0/dout
+  slice_7/din cfg_slice_0/dout
+  slice_8/din cfg_slice_0/dout
 }
 
 # TX 0
@@ -267,11 +270,13 @@ module tx_0 {
   slice_2/din cfg_slice_1/dout
   slice_3/din cfg_slice_1/dout
   slice_4/din cfg_slice_1/dout
+  slice_5/din cfg_slice_1/dout
+  slice_6/din cfg_slice_1/dout
   dds_0/m_axis_data_tdata rx_0/dds_slice_4/din
   dds_0/m_axis_data_tdata rx_0/dds_slice_5/din
   dds_0/m_axis_data_tdata rx_0/dds_slice_6/din
   dds_0/m_axis_data_tdata rx_0/dds_slice_7/din
-  concat_0/dout dac_0/s_axis_tdata
+  concat_1/dout dac_0/s_axis_tdata
   mult_2/P rx_0/adc_slice_6/din
   mult_2/P rx_0/adc_slice_7/din
 }

projects/sdr_transceiver_hpsdr/rx.tcl

@@ -8,6 +8,23 @@ cell pavel-demin:user:port_slicer:1.0 slice_3 {
   DIN_WIDTH 96 DIN_FROM 15 DIN_TO 0
 }
 
+for {set i 0} {$i <= 2} {incr i} {
+
+  # Create port_slicer
+  cell pavel-demin:user:port_slicer:1.0 slice_[expr $i + 4] {
+    DIN_WIDTH 96 DIN_FROM [expr $i + 16] DIN_TO [expr $i + 16]
+  }
+
+  # Create port_selector
+  cell pavel-demin:user:port_selector:1.0 selector_$i {
+    DOUT_WIDTH 16
+  } {
+    cfg slice_[expr $i + 4]/dout
+    din /adc_0/m_axis_tdata
+  }
+
+}
+
 for {set i 0} {$i <= 1} {incr i} {
 
   # Create port_slicer
@@ -16,15 +33,15 @@ for {set i 0} {$i <= 1} {incr i} {
   }
 
   # Create port_slicer
-  cell pavel-demin:user:port_slicer:1.0 slice_[expr $i + 4] {
+  cell pavel-demin:user:port_slicer:1.0 slice_[expr $i + 7] {
     DIN_WIDTH 96 DIN_FROM [expr 32 * $i + 63] DIN_TO [expr 32 * $i + 32]
   }
 
   # Create axis_constant
   cell pavel-demin:user:axis_constant:1.0 phase_$i {
     AXIS_TDATA_WIDTH 32
   } {
-    cfg_data slice_[expr $i + 4]/dout
+    cfg_data slice_[expr $i + 7]/dout
     aclk /pll_0/clk_out1
   }
 
@@ -50,13 +67,6 @@ for {set i 0} {$i <= 1} {incr i} {
 
 for {set i 0} {$i <= 3} {incr i} {
 
-  # Create port_slicer
-  cell pavel-demin:user:port_slicer:1.0 adc_slice_$i {
-    DIN_WIDTH 32 DIN_FROM [expr 16 * ($i / 2) + 13] DIN_TO [expr 16 * ($i / 2)]
-  } {
-    din /adc_0/m_axis_tdata
-  }
-
   # Create port_slicer
   cell pavel-demin:user:port_slicer:1.0 dds_slice_$i {
     DIN_WIDTH 48 DIN_FROM [expr 24 * ($i % 2) + 23] DIN_TO [expr 24 * ($i % 2)]
@@ -71,15 +81,18 @@ for {set i 0} {$i <= 3} {incr i} {
 
 }
 
-for {set i 0} {$i <= 1} {incr i} {
+for {set i 0} {$i <= 5} {incr i} {
 
   # Create port_slicer
-  cell pavel-demin:user:port_slicer:1.0 adc_slice_[expr $i + 4] {
-    DIN_WIDTH 32 DIN_FROM 29 DIN_TO 16
+  cell pavel-demin:user:port_slicer:1.0 adc_slice_$i {
+    DIN_WIDTH 16 DIN_FROM 15 DIN_TO 0
   } {
-    din /adc_0/m_axis_tdata
+    din selector_[expr $i / 2]/dout
   }
 
+}
+
+for {set i 0} {$i <= 1} {incr i} {
 
   # Create port_slicer
   cell pavel-demin:user:port_slicer:1.0 adc_slice_[expr $i + 6] {

projects/sdr_transceiver_hpsdr/server/sdr-transceiver-hpsdr.c

@@ -345,6 +345,7 @@ int main(int argc, char *argv[])
   volatile int32_t *tx_ramp, *dac_ramp;
   volatile uint16_t *tx_size, *dac_size;
   volatile int16_t *ps_level;
+  volatile uint8_t *rx_sel, *tx_sel;
   float scale, ramp[1024], a[4] = {0.35875, 0.48829, 0.14128, 0.01168};
   uint8_t reply[11] = {0xef, 0xfe, 2, 0, 0, 0, 0, 0, 0, 32, 1};
   uint8_t id[4] = {0xef, 0xfe, 1, 6};
@@ -358,6 +359,21 @@ int main(int argc, char *argv[])
   struct timeval tv;
   struct timespec ts;
   int yes = 1;
+  char *end;
+  uint8_t chan = 0;
+  long number;
+
+  for(i = 0; i < 5; ++i)
+  {
+    errno = 0;
+    number = (argc == 6) ? strtol(argv[i + 1], &end, 10) : -1;
+    if(errno != 0 || end == argv[i + 1] || number < 1 || number > 2)
+    {
+      printf("Usage: sdr-transceiver-hpsdr 1|2 1|2 1|2 1|2 1|2\n");
+      return EXIT_FAILURE;
+    }
+    chan |= (number - 1) << i;
+  }
 
   if((fd = open("/dev/mem", O_RDWR)) < 0)
   {
@@ -493,6 +509,8 @@ int main(int argc, char *argv[])
 
   rx_rate = ((uint16_t *)(cfg + 4));
 
+  rx_sel = ((uint8_t *)(cfg + 6));
+
   rx_freq[0] = ((uint32_t *)(cfg + 8));
   rx_freq[1] = ((uint32_t *)(cfg + 12));
 
@@ -501,6 +519,8 @@ int main(int argc, char *argv[])
   tx_level = ((int16_t *)(cfg + 22));
   ps_level = ((int16_t *)(cfg + 24));
 
+  tx_sel = ((uint8_t *)(cfg + 26));
+
   dac_freq = ((uint32_t *)(cfg + 28));
   dac_size = ((uint16_t *)(cfg + 32));
   dac_level = ((int16_t *)(cfg + 34));
@@ -511,6 +531,10 @@ int main(int argc, char *argv[])
   adc_cntr = ((uint16_t *)(sts + 18));
   gpio_in = ((uint8_t *)(sts + 20));
 
+  /* set rx and tx selectors */
+  *rx_sel = chan & 7;
+  *tx_sel = (chan >> 3) & 3;
+
   /* set all GPIO pins to low */
   *gpio_out = 0;
 

projects/sdr_transceiver_hpsdr/tx.tcl

@@ -421,3 +421,30 @@ cell xilinx.com:ip:xlconcat:2.1 concat_0 {
   In0 mult_1/P
   In1 cordic_0/m_axis_dout_tdata
 }
+
+for {set i 0} {$i <= 1} {incr i} {
+
+  # Create port_slicer
+  cell pavel-demin:user:port_slicer:1.0 slice_[expr $i + 5] {
+    DIN_WIDTH 96 DIN_FROM [expr $i + 80] DIN_TO [expr $i + 80]
+  }
+
+  # Create port_selector
+  cell pavel-demin:user:port_selector:1.0 selector_$i {
+    DOUT_WIDTH 16
+  } {
+    cfg slice_[expr $i + 5]/dout
+    din concat_0/dout
+  }
+
+}
+
+# Create xlconcat
+cell xilinx.com:ip:xlconcat:2.1 concat_1 {
+  NUM_PORTS 2
+  IN0_WIDTH 16
+  IN1_WIDTH 16
+} {
+  In0 selector_0/dout
+  In1 selector_1/dout
+}