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Changing it so Zalasr has one bit hardcoded for each, to reduce opcod…
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…e confusion hopefully
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brs committed Oct 19, 2023
1 parent e826c5a commit 65c40e9
Showing 1 changed file with 8 additions and 8 deletions.
16 changes: 8 additions & 8 deletions unratified/rv_zalasr
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Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
lb. rd rs1 aq rl 31..27=6 24..20=0 14..12=0 6..2=0x0B 1..0=3
lh. rd rs1 aq rl 31..27=6 24..20=0 14..12=1 6..2=0x0B 1..0=3
lw. rd rs1 aq rl 31..27=6 24..20=0 14..12=2 6..2=0x0B 1..0=3
ld. rd rs1 aq rl 31..27=6 24..20=0 14..12=3 6..2=0x0B 1..0=3
sb. rs1 rs2 aq rl 31..27=7 14..12=0 11..7=0 6..2=0x0B 1..0=3
sh. rs1 rs2 aq rl 31..27=7 14..12=1 11..7=0 6..2=0x0B 1..0=3
sw. rs1 rs2 aq rl 31..27=7 14..12=2 11..7=0 6..2=0x0B 1..0=3
sd. rs1 rs2 aq rl 31..27=7 14..12=3 11..7=0 6..2=0x0B 1..0=3
lb.aq rd rs1 rl 31..27=6 24..20=0 14..12=0 6..2=0x0B 1..0=3
lh.aq rd rs1 rl 31..27=6 24..20=0 14..12=1 6..2=0x0B 1..0=3
lw.aq rd rs1 rl 31..27=6 24..20=0 14..12=2 6..2=0x0B 1..0=3
ld.aq rd rs1 rl 31..27=6 24..20=0 14..12=3 6..2=0x0B 1..0=3
sb.rl rs1 rs2 aq 31..27=7 14..12=0 11..7=0 6..2=0x0B 1..0=3
sh.rl rs1 rs2 aq 31..27=7 14..12=1 11..7=0 6..2=0x0B 1..0=3
sw.rl rs1 rs2 aq 31..27=7 14..12=2 11..7=0 6..2=0x0B 1..0=3
sd.rl rs1 rs2 aq 31..27=7 14..12=3 11..7=0 6..2=0x0B 1..0=3

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