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Merge pull request #179 from urdh/update-pac-crate-to-0.15
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Update stm32f0 PAC crate to 0.15
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@newAM
newAM authored Aug 24, 2024
2 parents b2e2e9d + 07f8382 commit 5f31f9e
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Showing 6 changed files with 60 additions and 59 deletions.
1 change: 1 addition & 0 deletions CHANGELOG.md
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Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
### Changed

- Updated the `cast` dependency from 0.2 to 0.3
- Updated `stm32f0` peripheral access crate from 0.14 to 0.15

### Added

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2 changes: 1 addition & 1 deletion Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,7 @@ bare-metal = { version = "1.0.0" }
cast = "0.3"
cortex-m = "0.7"
embedded-hal = { version = "0.2", features = ["unproven"] }
stm32f0 = "0.14"
stm32f0 = "0.15"
nb = "1"
void = { version = "1.0", default-features = false }
stm32-usbd = { version = "0.6", optional = true }
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30 changes: 15 additions & 15 deletions src/adc.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -103,14 +103,14 @@ impl AdcSampleTime {
impl From<AdcSampleTime> for SMP_A {
fn from(val: AdcSampleTime) -> Self {
match val {
AdcSampleTime::T_1 => SMP_A::CYCLES1_5,
AdcSampleTime::T_7 => SMP_A::CYCLES7_5,
AdcSampleTime::T_13 => SMP_A::CYCLES13_5,
AdcSampleTime::T_28 => SMP_A::CYCLES28_5,
AdcSampleTime::T_41 => SMP_A::CYCLES41_5,
AdcSampleTime::T_55 => SMP_A::CYCLES55_5,
AdcSampleTime::T_71 => SMP_A::CYCLES71_5,
AdcSampleTime::T_239 => SMP_A::CYCLES239_5,
AdcSampleTime::T_1 => SMP_A::Cycles15,
AdcSampleTime::T_7 => SMP_A::Cycles75,
AdcSampleTime::T_13 => SMP_A::Cycles135,
AdcSampleTime::T_28 => SMP_A::Cycles285,
AdcSampleTime::T_41 => SMP_A::Cycles415,
AdcSampleTime::T_55 => SMP_A::Cycles555,
AdcSampleTime::T_71 => SMP_A::Cycles715,
AdcSampleTime::T_239 => SMP_A::Cycles2395,
}
}
}
Expand Down Expand Up @@ -148,9 +148,9 @@ impl AdcAlign {
impl From<AdcAlign> for ALIGN_A {
fn from(val: AdcAlign) -> Self {
match val {
AdcAlign::Left => ALIGN_A::LEFT,
AdcAlign::Right => ALIGN_A::RIGHT,
AdcAlign::LeftAsRM => ALIGN_A::LEFT,
AdcAlign::Left => ALIGN_A::Left,
AdcAlign::Right => ALIGN_A::Right,
AdcAlign::LeftAsRM => ALIGN_A::Left,
}
}
}
Expand Down Expand Up @@ -178,10 +178,10 @@ impl AdcPrecision {
impl From<AdcPrecision> for RES_A {
fn from(val: AdcPrecision) -> Self {
match val {
AdcPrecision::B_12 => RES_A::TWELVEBIT,
AdcPrecision::B_10 => RES_A::TENBIT,
AdcPrecision::B_8 => RES_A::EIGHTBIT,
AdcPrecision::B_6 => RES_A::SIXBIT,
AdcPrecision::B_12 => RES_A::TwelveBit,
AdcPrecision::B_10 => RES_A::TenBit,
AdcPrecision::B_8 => RES_A::EightBit,
AdcPrecision::B_6 => RES_A::SixBit,
}
}
}
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64 changes: 32 additions & 32 deletions src/pwm.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -206,7 +206,7 @@ macro_rules! pwm_4_channels {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr1.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr1().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -216,7 +216,7 @@ macro_rules! pwm_4_channels {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr1.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr1().write(|w| w.ccr().bits(duty.into())) }
}
}

Expand All @@ -235,7 +235,7 @@ macro_rules! pwm_4_channels {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr2.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr2().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -245,7 +245,7 @@ macro_rules! pwm_4_channels {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr2.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr2().write(|w| w.ccr().bits(duty.into())) }
}
}

Expand All @@ -264,7 +264,7 @@ macro_rules! pwm_4_channels {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr3.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr3().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -274,7 +274,7 @@ macro_rules! pwm_4_channels {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr3.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr3().write(|w| w.ccr().bits(duty.into())) }
}
}

Expand All @@ -293,7 +293,7 @@ macro_rules! pwm_4_channels {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr4.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr4().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -303,7 +303,7 @@ macro_rules! pwm_4_channels {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr4.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr4().write(|w| w.ccr().bits(duty.into())) }
}
}
)+
Expand Down Expand Up @@ -395,7 +395,7 @@ macro_rules! pwm_4_channels_with_3_complementary_outputs {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr1.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr1().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -405,7 +405,7 @@ macro_rules! pwm_4_channels_with_3_complementary_outputs {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr1.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr1().write(|w| w.ccr().bits(duty.into())) }
}
}

Expand All @@ -424,7 +424,7 @@ macro_rules! pwm_4_channels_with_3_complementary_outputs {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr1.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr1().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -434,7 +434,7 @@ macro_rules! pwm_4_channels_with_3_complementary_outputs {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr1.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr1().write(|w| w.ccr().bits(duty.into())) }
}
}

Expand All @@ -453,7 +453,7 @@ macro_rules! pwm_4_channels_with_3_complementary_outputs {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr2.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr2().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -463,7 +463,7 @@ macro_rules! pwm_4_channels_with_3_complementary_outputs {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr2.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr2().write(|w| w.ccr().bits(duty.into())) }
}
}

Expand All @@ -482,7 +482,7 @@ macro_rules! pwm_4_channels_with_3_complementary_outputs {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr2.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr2().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -492,7 +492,7 @@ macro_rules! pwm_4_channels_with_3_complementary_outputs {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr2.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr2().write(|w| w.ccr().bits(duty.into())) }
}
}

Expand All @@ -511,7 +511,7 @@ macro_rules! pwm_4_channels_with_3_complementary_outputs {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr3.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr3().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -521,7 +521,7 @@ macro_rules! pwm_4_channels_with_3_complementary_outputs {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr3.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr3().write(|w| w.ccr().bits(duty.into())) }
}
}

Expand All @@ -540,7 +540,7 @@ macro_rules! pwm_4_channels_with_3_complementary_outputs {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr3.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr3().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -550,7 +550,7 @@ macro_rules! pwm_4_channels_with_3_complementary_outputs {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr3.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr3().write(|w| w.ccr().bits(duty.into())) }
}
}

Expand All @@ -569,7 +569,7 @@ macro_rules! pwm_4_channels_with_3_complementary_outputs {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr4.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr4().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -579,7 +579,7 @@ macro_rules! pwm_4_channels_with_3_complementary_outputs {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr4.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr4().write(|w| w.ccr().bits(duty.into())) }
}
}
)+
Expand Down Expand Up @@ -666,7 +666,7 @@ macro_rules! pwm_2_channels {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr1.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr1().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -676,7 +676,7 @@ macro_rules! pwm_2_channels {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr1.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr1().write(|w| w.ccr().bits(duty.into())) }
}
}

Expand All @@ -695,7 +695,7 @@ macro_rules! pwm_2_channels {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr2.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr2().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -705,7 +705,7 @@ macro_rules! pwm_2_channels {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr2.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr2().write(|w| w.ccr().bits(duty.into())) }
}
}
)+
Expand Down Expand Up @@ -775,7 +775,7 @@ macro_rules! pwm_1_channel {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr1.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr1().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -785,7 +785,7 @@ macro_rules! pwm_1_channel {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr1.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr1().write(|w| w.ccr().bits(duty.into())) }
}
}
)+
Expand Down Expand Up @@ -858,7 +858,7 @@ macro_rules! pwm_1_channel_with_complementary_outputs {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr1.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr1().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -868,7 +868,7 @@ macro_rules! pwm_1_channel_with_complementary_outputs {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr1.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr1().write(|w| w.ccr().bits(duty.into())) }
}
}

Expand All @@ -887,7 +887,7 @@ macro_rules! pwm_1_channel_with_complementary_outputs {

//NOTE(unsafe) atomic read with no side effects
fn get_duty(&self) -> u16 {
unsafe { (*$TIMX::ptr()).ccr1.read().ccr().bits() as u16 }
unsafe { (*$TIMX::ptr()).ccr1().read().ccr().bits() as u16 }
}

//NOTE(unsafe) atomic read with no side effects
Expand All @@ -897,7 +897,7 @@ macro_rules! pwm_1_channel_with_complementary_outputs {

//NOTE(unsafe) atomic write with no side effects
fn set_duty(&mut self, duty: u16) {
unsafe { (*$TIMX::ptr()).ccr1.write(|w| w.ccr().bits(duty.into())) }
unsafe { (*$TIMX::ptr()).ccr1().write(|w| w.ccr().bits(duty.into())) }
}
}
)+
Expand Down
10 changes: 5 additions & 5 deletions src/rcc.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -154,8 +154,8 @@ mod inner {

pub(super) fn get_sww(c_src: &SysClkSource) -> SW_A {
match c_src {
SysClkSource::HSI => SW_A::HSI,
SysClkSource::HSE(_, _) => SW_A::HSE,
SysClkSource::HSI => SW_A::Hsi,
SysClkSource::HSE(_, _) => SW_A::Hse,
}
}
}
Expand Down Expand Up @@ -316,7 +316,7 @@ mod inner {

pub(super) fn get_sww(c_src: &SysClkSource) -> SW_A {
match c_src {
SysClkSource::HSI => SW_A::HSI,
SysClkSource::HSI => SW_A::Hsi,
#[cfg(any(
feature = "stm32f042",
feature = "stm32f048",
Expand All @@ -326,8 +326,8 @@ mod inner {
feature = "stm32f091",
feature = "stm32f098",
))]
SysClkSource::HSI48 => SW_A::HSI48,
SysClkSource::HSE(_, _) => SW_A::HSE,
SysClkSource::HSI48 => SW_A::Hsi48,
SysClkSource::HSE(_, _) => SW_A::Hse,
}
}
}
Expand Down
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