Automatically create a NIOS II Eclipse Project with the latest FreeRTOS Version, the Intel hwlib and more...
32-bit processor simulation and implementation on a FPGA, using VHDL and Intel Quartus Prime software
Configurable real time clock on the Terasic DE0-CV board, using VHDL and custom ASM code
Traffic Light System designed in VHDL for Digital System Design Course in EPFL BA2 (IC Section) Grade: 100%
A digital clock system implemented with VHDL via Intel Quartus Prime and ModelSim.
⚙️ Field-Programmable Gate Array (FPGA) MIPS microprocessor
⚙️ Field-Programmable Gate Array (FPGA) MIPS microprocessor
Memory Initialization File
Yahtzee game designed in VHDL for Digital System Design Course in EPFL BA2 (IC Section) Grade: 88.89%
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