feat(trap): support atomic instructions emulation #5
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
tfx2001
force-pushed
the
dev/atomic-emulation
branch
from
87222ce to
15d2ce2
Compare
tfx2001
force-pushed
the
dev/atomic-emulation
branch
2 times, most recently
from
28c5d94 to
47946e5
Compare
Since HPM6360 dose not support execute atomic load/store with SDRAM address range, we need to emulation atomic instructions execute in trap handler then the Linux kernel can runs without any modifications and user space thread also is supported. For AMO instructions, they will trap into Store/AMO access fault exception during execution, so we can emulate it in store fault exception handler. For lr/sc instructions, lr will trap into Load access fault during execution but sc won't, however. So we need to replace sc into an illegal instruction which I use csrrw zero, time, zero here, then it will trap into Illegal instruction exception and will be replaced back during exception handling. After replacing instructions we have to execute fence.i to make sure this data store is visible to the subsequent instruction fetch. Signed-off-by: tfx2001 <tfx2001@outlook.com>
Signed-off-by: tfx2001 <tfx2001@outlook.com>
Signed-off-by: tfx2001 <tfx2001@outlook.com>
tfx2001
force-pushed
the
dev/atomic-emulation
branch
from
bed01ea to
d4f04d9
Compare
This was referenced Aug 16, 2024
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Since HPM6360 does not support execute atomic load/store with SDRAM address range, we need to emulate atomic instructions execute in trap handler then the Linux kernel can runs without any modifications and user space thread also is supported.
For AMO instructions, they will trap into Store/AMO access fault exception during execution, so we can emulate it in store fault exception handler.
For
lr/scinstructions,lrwill trap into Load access fault during execution butscwon't, however. So we need to replacescinto an illegal instruction which I usecsrrw zero, time, zerohere, then it will trap into Illegal instruction exception and will be replaced back during exception handling. After replacing instructions we have to executefence.ito make sure this data store is visible to the subsequent instruction fetch.